diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/sys/cdefs.h src/sys/sys/cdefs.h --- src.orig/sys/sys/cdefs.h 2007-12-08 09:21:39.000000000 +0900 +++ src/sys/sys/cdefs.h 2008-04-12 00:50:07.000000000 +0900 @@ -215,6 +215,10 @@ #define __packed /* delete */ #define __aligned(x) /* delete */ #define __section(x) /* delete */ +#elif defined(_MSC_VER) +#define __packed /* XXX ignore for now */ +#define __aligned(x) /* XXX ignore for now */ +#define __section(x) /* XXX ignore for now */ #else #define __packed error: no __packed for this compiler #define __aligned(x) error: no __aligned for this compiler diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/conf/platid.def src/sys/arch/hpc/conf/platid.def --- src.orig/sys/arch/hpc/conf/platid.def 2008-04-29 11:38:31.000000000 +0900 +++ src/sys/arch/hpc/conf/platid.def 2008-04-29 11:47:43.000000000 +0900 @@ -76,6 +76,7 @@ } XSCALE { PXA250 + PXA270 } } #endif /* hpcarm */ @@ -158,8 +159,9 @@ #endif /* hpcsh */ } -#ifdef hpcmips +#if defined(hpcmips) || defined(hpcarm) Sharp { +#if defined(hpcmips) Tripad { PV { CPU=MIPS_VR_4111 PV6000 @@ -183,8 +185,18 @@ CPU=MIPS_TX_3912 HC1200 } } -} #endif /* hpcmips */ +#if defined(hpcarm) + WZERO3 { + CPU=ARM_XSCALE_PXA270 + WS003SH -" W-ZERO3 (WS003SH)" + WS004SH -" W-ZERO3 (WS004SH)" + WS007SH -" W-ZERO3[es] (WS007SH)" + WS011SH -" Advanced/W-ZERO3[es] (WS011SH)" + } +#endif /* hpcarm */ +} +#endif /* hpcmips || hpcarm */ #ifdef hpcmips Fujitsu { diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/hpc/platid_mask.c src/sys/arch/hpc/hpc/platid_mask.c --- src.orig/sys/arch/hpc/hpc/platid_mask.c 2008-04-29 11:38:32.000000000 +0900 +++ src/sys/arch/hpc/hpc/platid_mask.c 2008-04-29 11:58:29.000000000 +0900 @@ -1,4 +1,4 @@ -/* $NetBSD: platid_mask.c,v 1.21 2008/04/28 20:23:19 martin Exp $ */ +/* $NetBSD: $ */ /*- * Copyright (c) 1999-2001 @@ -156,6 +156,10 @@ PLATID_CPU_ARM_XSCALE_PXA250, PLATID_WILD }}; +platid_t platid_mask_CPU_ARM_XSCALE_PXA270 = {{ + PLATID_CPU_ARM_XSCALE_PXA270, + PLATID_WILD +}}; #endif /* hpcarm */ #ifdef hpcmips platid_t platid_mask_MACH_NEC = {{ @@ -389,11 +393,12 @@ PLATID_MACH_CASIO_CASSIOPEIAA_A55V }}; #endif /* hpcsh */ -#ifdef hpcmips +#if defined(hpcmips) || defined(hpcarm) platid_t platid_mask_MACH_SHARP = {{ PLATID_WILD, PLATID_MACH_SHARP }}; +#if defined(hpcmips) platid_t platid_mask_MACH_SHARP_TRIPAD = {{ PLATID_WILD, PLATID_MACH_SHARP_TRIPAD @@ -455,6 +460,29 @@ PLATID_MACH_SHARP_MOBILON_HC1200 }}; #endif /* hpcmips */ +#if defined(hpcarm) +platid_t platid_mask_MACH_SHARP_WZERO3 = {{ + PLATID_WILD, + PLATID_MACH_SHARP_WZERO3 +}}; +platid_t platid_mask_MACH_SHARP_WZERO3_WS003SH = {{ + PLATID_CPU_ARM_XSCALE_PXA270, + PLATID_MACH_SHARP_WZERO3_WS003SH +}}; +platid_t platid_mask_MACH_SHARP_WZERO3_WS004SH = {{ + PLATID_CPU_ARM_XSCALE_PXA270, + PLATID_MACH_SHARP_WZERO3_WS004SH +}}; +platid_t platid_mask_MACH_SHARP_WZERO3_WS007SH = {{ + PLATID_CPU_ARM_XSCALE_PXA270, + PLATID_MACH_SHARP_WZERO3_WS007SH +}}; +platid_t platid_mask_MACH_SHARP_WZERO3_WS011SH = {{ + PLATID_CPU_ARM_XSCALE_PXA270, + PLATID_MACH_SHARP_WZERO3_WS011SH +}}; +#endif /* hpcarm */ +#endif /* hpcmips || hpcarm */ #ifdef hpcmips platid_t platid_mask_MACH_FUJITSU = {{ PLATID_WILD, diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/hpc/platid_name.c src/sys/arch/hpc/hpc/platid_name.c --- src.orig/sys/arch/hpc/hpc/platid_name.c 2008-04-29 11:38:32.000000000 +0900 +++ src/sys/arch/hpc/hpc/platid_name.c 2008-04-29 11:58:30.000000000 +0900 @@ -1,4 +1,4 @@ -/* $NetBSD: platid_name.c,v 1.21 2008/04/28 20:23:19 martin Exp $ */ +/* $NetBSD: $ */ /*- * Copyright (c) 1999-2001 @@ -97,6 +97,8 @@ TEXT("ARM XSCALE") }, { &platid_mask_CPU_ARM_XSCALE_PXA250, TEXT("ARM XSCALE PXA250") }, + { &platid_mask_CPU_ARM_XSCALE_PXA270, + TEXT("ARM XSCALE PXA270") }, #endif /* hpcarm */ #ifdef hpcmips { &platid_mask_MACH_NEC, @@ -218,9 +220,10 @@ { &platid_mask_MACH_CASIO_CASSIOPEIAA_A55V, TEXT("CASIO Cassiopeia A-55V") }, #endif /* hpcsh */ -#ifdef hpcmips +#if defined(hpcmips) || defined(hpcarm) { &platid_mask_MACH_SHARP, TEXT("Sharp") }, +#if defined(hpcmips) { &platid_mask_MACH_SHARP_TRIPAD, TEXT("Sharp Tripad") }, { &platid_mask_MACH_SHARP_TRIPAD_PV, @@ -252,6 +255,19 @@ { &platid_mask_MACH_SHARP_MOBILON_HC1200, TEXT("Sharp Mobilon HC1200") }, #endif /* hpcmips */ +#if defined(hpcarm) + { &platid_mask_MACH_SHARP_WZERO3, + TEXT("Sharp WZERO3") }, + { &platid_mask_MACH_SHARP_WZERO3_WS003SH, + TEXT("Sharp W-ZERO3 (WS003SH)") }, + { &platid_mask_MACH_SHARP_WZERO3_WS004SH, + TEXT("Sharp W-ZERO3 (WS004SH)") }, + { &platid_mask_MACH_SHARP_WZERO3_WS007SH, + TEXT("Sharp W-ZERO3[es] (WS007SH)") }, + { &platid_mask_MACH_SHARP_WZERO3_WS011SH, + TEXT("Sharp Advanced/W-ZERO3[es] (WS011SH)") }, +#endif /* hpcarm */ +#endif /* hpcmips || hpcarm */ #ifdef hpcmips { &platid_mask_MACH_FUJITSU, TEXT("Fujitsu") }, diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/include/platid_generated.h src/sys/arch/hpc/include/platid_generated.h --- src.orig/sys/arch/hpc/include/platid_generated.h 2008-04-29 11:38:32.000000000 +0900 +++ src/sys/arch/hpc/include/platid_generated.h 2008-04-29 11:58:29.000000000 +0900 @@ -1,4 +1,4 @@ -/* $NetBSD: platid_generated.h,v 1.21 2008/04/28 20:23:20 martin Exp $ */ +/* $NetBSD: $ */ /*- * Copyright (c) 1999-2001 @@ -151,6 +151,10 @@ #define PLATID_CPU_ARM_XSCALE_PXA250 \ ((PLATID_CPU_ARM_XSCALE_PXA250_NUM << PLATID_CPU_MODEL_SHIFT)| \ PLATID_CPU_ARM_XSCALE) +#define PLATID_CPU_ARM_XSCALE_PXA270_NUM 2 +#define PLATID_CPU_ARM_XSCALE_PXA270 \ + ((PLATID_CPU_ARM_XSCALE_PXA270_NUM << PLATID_CPU_MODEL_SHIFT)| \ + PLATID_CPU_ARM_XSCALE) #endif /* hpcarm */ #ifdef hpcmips #ifndef SPEC_PLATFORM @@ -549,13 +553,14 @@ ((PLATID_MACH_CASIO_CASSIOPEIAA_A55V_NUM << PLATID_SUBMODEL_SHIFT)| \ PLATID_MACH_CASIO_CASSIOPEIAA_AXX) #endif /* hpcsh */ -#ifdef hpcmips +#if defined(hpcmips) || defined(hpcarm) #ifndef SPEC_PLATFORM #define SPEC_MACH_SHARP #endif /* !SPEC_PLATFORM */ #define PLATID_MACH_SHARP_NUM 4 #define PLATID_MACH_SHARP \ ((PLATID_MACH_SHARP_NUM << PLATID_VENDOR_SHIFT)) +#if defined(hpcmips) #ifndef SPEC_PLATFORM #define SPEC_MACH_SHARP_TRIPAD #endif /* !SPEC_PLATFORM */ @@ -662,6 +667,44 @@ ((PLATID_MACH_SHARP_MOBILON_HC1200_NUM << PLATID_SUBMODEL_SHIFT)| \ PLATID_MACH_SHARP_MOBILON_HC) #endif /* hpcmips */ +#if defined(hpcarm) +#ifndef SPEC_PLATFORM +#define SPEC_MACH_SHARP_WZERO3 +#endif /* !SPEC_PLATFORM */ +#define PLATID_MACH_SHARP_WZERO3_NUM 4 +#define PLATID_MACH_SHARP_WZERO3 \ + ((PLATID_MACH_SHARP_WZERO3_NUM << PLATID_SERIES_SHIFT)| \ + PLATID_MACH_SHARP) +#ifndef SPEC_PLATFORM +#define SPEC_MACH_SHARP_WZERO3_WS003SH +#endif /* !SPEC_PLATFORM */ +#define PLATID_MACH_SHARP_WZERO3_WS003SH_NUM 1 +#define PLATID_MACH_SHARP_WZERO3_WS003SH \ + ((PLATID_MACH_SHARP_WZERO3_WS003SH_NUM << PLATID_MODEL_SHIFT)| \ + PLATID_MACH_SHARP_WZERO3) +#ifndef SPEC_PLATFORM +#define SPEC_MACH_SHARP_WZERO3_WS004SH +#endif /* !SPEC_PLATFORM */ +#define PLATID_MACH_SHARP_WZERO3_WS004SH_NUM 2 +#define PLATID_MACH_SHARP_WZERO3_WS004SH \ + ((PLATID_MACH_SHARP_WZERO3_WS004SH_NUM << PLATID_MODEL_SHIFT)| \ + PLATID_MACH_SHARP_WZERO3) +#ifndef SPEC_PLATFORM +#define SPEC_MACH_SHARP_WZERO3_WS007SH +#endif /* !SPEC_PLATFORM */ +#define PLATID_MACH_SHARP_WZERO3_WS007SH_NUM 3 +#define PLATID_MACH_SHARP_WZERO3_WS007SH \ + ((PLATID_MACH_SHARP_WZERO3_WS007SH_NUM << PLATID_MODEL_SHIFT)| \ + PLATID_MACH_SHARP_WZERO3) +#ifndef SPEC_PLATFORM +#define SPEC_MACH_SHARP_WZERO3_WS011SH +#endif /* !SPEC_PLATFORM */ +#define PLATID_MACH_SHARP_WZERO3_WS011SH_NUM 4 +#define PLATID_MACH_SHARP_WZERO3_WS011SH \ + ((PLATID_MACH_SHARP_WZERO3_WS011SH_NUM << PLATID_MODEL_SHIFT)| \ + PLATID_MACH_SHARP_WZERO3) +#endif /* hpcarm */ +#endif /* hpcmips || hpcarm */ #ifdef hpcmips #ifndef SPEC_PLATFORM #define SPEC_MACH_FUJITSU diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/include/platid_mask.h src/sys/arch/hpc/include/platid_mask.h --- src.orig/sys/arch/hpc/include/platid_mask.h 2008-04-29 11:38:32.000000000 +0900 +++ src/sys/arch/hpc/include/platid_mask.h 2008-04-29 11:58:29.000000000 +0900 @@ -1,4 +1,4 @@ -/* $NetBSD: platid_mask.h,v 1.21 2008/04/28 20:23:20 martin Exp $ */ +/* $NetBSD: $ */ /*- * Copyright (c) 1999-2001 @@ -154,6 +154,10 @@ #ifdef PLATID_DEFINE_MASK_NICKNAME # define GENERIC_ARM_XSCALE_PXA250 ((int)&platid_mask_CPU_ARM_XSCALE_PXA250) #endif +extern platid_t platid_mask_CPU_ARM_XSCALE_PXA270; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define GENERIC_ARM_XSCALE_PXA270 ((int)&platid_mask_CPU_ARM_XSCALE_PXA270) +#endif #endif /* hpcarm */ #ifdef hpcmips extern platid_t platid_mask_MACH_NEC; @@ -387,11 +391,12 @@ # define CASIO_CASSIOPEIAA_A55V ((int)&platid_mask_MACH_CASIO_CASSIOPEIAA_A55V) #endif #endif /* hpcsh */ -#ifdef hpcmips +#if defined(hpcmips) || defined(hpcarm) extern platid_t platid_mask_MACH_SHARP; #ifdef PLATID_DEFINE_MASK_NICKNAME # define SHARP ((int)&platid_mask_MACH_SHARP) #endif +#if defined(hpcmips) extern platid_t platid_mask_MACH_SHARP_TRIPAD; #ifdef PLATID_DEFINE_MASK_NICKNAME # define SHARP_TRIPAD ((int)&platid_mask_MACH_SHARP_TRIPAD) @@ -453,6 +458,29 @@ # define SHARP_MOBILON_HC1200 ((int)&platid_mask_MACH_SHARP_MOBILON_HC1200) #endif #endif /* hpcmips */ +#if defined(hpcarm) +extern platid_t platid_mask_MACH_SHARP_WZERO3; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define SHARP_WZERO3 ((int)&platid_mask_MACH_SHARP_WZERO3) +#endif +extern platid_t platid_mask_MACH_SHARP_WZERO3_WS003SH; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define SHARP_WZERO3_WS003SH ((int)&platid_mask_MACH_SHARP_WZERO3_WS003SH) +#endif +extern platid_t platid_mask_MACH_SHARP_WZERO3_WS004SH; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define SHARP_WZERO3_WS004SH ((int)&platid_mask_MACH_SHARP_WZERO3_WS004SH) +#endif +extern platid_t platid_mask_MACH_SHARP_WZERO3_WS007SH; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define SHARP_WZERO3_WS007SH ((int)&platid_mask_MACH_SHARP_WZERO3_WS007SH) +#endif +extern platid_t platid_mask_MACH_SHARP_WZERO3_WS011SH; +#ifdef PLATID_DEFINE_MASK_NICKNAME +# define SHARP_WZERO3_WS011SH ((int)&platid_mask_MACH_SHARP_WZERO3_WS011SH) +#endif +#endif /* hpcarm */ +#endif /* hpcmips || hpcarm */ #ifdef hpcmips extern platid_t platid_mask_MACH_FUJITSU; #ifdef PLATID_DEFINE_MASK_NICKNAME diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm.asm --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm.asm 2008-05-08 20:40:50.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm.asm 2008-05-08 20:47:08.000000000 +0900 @@ -33,10 +33,13 @@ ;arm.obj ; ; dummy buffer for WritebackDCache - EXPORT |dcachebuf| [DATA] + EXPORT |dcachesize| [DATA] + EXPORT |dcachebuf| [DATA] AREA |.data|, DATA +|dcachesize| + DCD 8192 ; for SA1100 |dcachebuf| - % 8192 ; D-cache size + % 65536 ; max D-cache size AREA |.text|, CODE, PIC @@ -91,14 +94,17 @@ EXPORT |WritebackDCache| |WritebackDCache| PROC - ldr r0, [pc, #16] ; dcachebuf - add r1, r0, #8192 ; cache-size is 8Kbyte. + ldr r0, [pc, #24] ; dcachebuf + ldr r1, [pc, #24] + ldr r1, [r1] ; dcache-size + add r1, r1, r0 |wbdc1| - ldr r2, [r0], #32 ; line-size is 32byte. + ldr r2, [r0], #32 teq r1, r0 bne |wbdc1| mov pc, lr DCD |dcachebuf| + DCD |dcachesize| ENDP ; |WritebackDCache| EXPORT |InvalidateDCache| @@ -112,8 +118,10 @@ EXPORT |WritebackInvalidateDCache| |WritebackInvalidateDCache| PROC - ldr r0, [pc, #20] ; dcachebuf - add r1, r0, #8192 + ldr r0, [pc, #28] ; dcachebuf + ldr r1, [pc, #28] + ldr r1, [r1] ; dcache-size + add r1, r1, r0 |wbidc1| ldr r2, [r0], #32 teq r1, r0 @@ -121,6 +129,7 @@ mcr p15, 0, r0, c7, c6, 0 mov pc, lr DCD |dcachebuf| + DCD |dcachesize| ENDP ; |WritebackInvalidateDCache| ; @@ -276,229 +285,4 @@ ENDP ; |GetCop15Reg14| ; Reg15 Test, clock, and idle (W) - ; FlatJump (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack - ; kaddr_t jump) - ; bootinfo boot information block address. - ; pvec page vector of kernel. - ; stack physical address of stack - ; jump physical address of boot function - ; *** MMU and pipeline behavier are SA-1100 specific. *** - EXPORT |FlatJump| -|FlatJump| PROC - ; disable interrupt - mrs r4, cpsr - orr r4, r4, #0xc0 - msr cpsr, r4 - ; disable MMU, I/D-Cache, Writebuffer. - ; interrupt vector address is 0xffff0000 - ; 32bit exception handler/address range. - ldr r4, [pc, #24] - ; Disable WB/Cache/MMU - mcr p15, 0, r4, c1, c0, 0 - ; Invalidate I/D-cache. - mcr p15, 0, r4, c7, c7, 0 ; Fetch translated fetch - ; Invalidate TLB entries. - mcr p15, 0, r4, c8, c7, 0 ; Fetch translated decode - ; jump to kernel entry physical address. - mov pc, r3 ; Fetch translated execute - ; NOTREACHED - nop ; Fetch nontranslated cache access - nop ; Fetch nontranslated writeback - mov pc, lr ; Fetch nontranslated - DCD 0x00002030 - ENDP ; |FlatJump| -; -; UART test -; - ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) - ; - EXPORT |boot_func| -|boot_func| PROC - nop ; Cop15 hazard - nop ; Cop15 hazard - nop ; Cop15 hazard - mov sp, r2 ; set bootloader stack -; mov r4, r0 -; mov r5, r1 -; bl colorbar -; mov r0, r4 -; mov r1, r5 - bl boot - nop ; NOTREACHED - nop - ENDP ; |boot_func| - - EXPORT |colorbar| -|colorbar| PROC - stmfd sp!, {r4-r7, lr} - adr r4, |$FBADDR| - ldr r4, [r4] - - mov r7, #8 - add r0, r0, r7 -|color_loop| - mov r6, r0 - and r6, r6, #7 - orr r6, r6, r6, LSL #8 - orr r6, r6, r6, LSL #16 - add r5, r4, #0x9600 -|fb_loop| - str r6, [r4], #4 - cmp r4, r5 - blt |fb_loop| - - subs r7, r7, #1 - bne |color_loop| - - ldmfd sp!, {r4-r7, pc} -|$FBADDR| - DCD 0xc0003000 ; use WindowsCE default. - ENDP ; |colorbar| - - EXPORT |boot| -|boot| PROC -; -; UART test code -; -; ; print boot_info address (r0) and page_vector start address (r1). -; mov r4, r0 -; mov r5, r1 -; mov r0, #'I' -; bl btputc -; mov r0, r4 -; bl hexdump -; mov r0, #'P' -; bl btputc -; mov r0, r5 -; bl hexdump -; mov r7, r4 -; mov r2, r5 ; start - - mov r7, r0 ; if enabled above debug print, remove this. - mov r2, r1 ; if enabled above debug print, remove this. -|page_loop| - mvn r0, #0 ; ~0 - cmp r2, r0 - beq |page_end| ; if (next == ~0) goto page_end - - mov r1, r2 ; p = next - ldr r2, [r1] ; next - ldr r3, [r1, #4] ; src - ldr r4, [r1, #8] ; dst - ldr r5, [r1, #12] ; sz - - cmp r3, r0 - add r6, r4, r5 ; end address - bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 - - mov r0, #0 -|page_memset| ; memset (dst, 0, sz) uncached. - str r0, [r4], #4 - cmp r4, r6 - blt |page_memset| - b |page_loop| - -|page_memcpy4| ; memcpy (dst, src, sz) uncached. - ldr r0, [r3], #4 - ldr r5, [r3], #4 - str r0, [r4], #4 - cmp r4, r6 - strlt r5, [r4], #4 - cmplt r4, r6 - blt |page_memcpy4| - - b |page_loop| -|page_end| - ; - ; jump to kernel - ; -; mov r0, #'E' -; bl btputc -; ldr r0, [r7] -; bl hexdump -; ldr r0, [r7] -; ldr r0, [r0] -; bl hexdump - - ; set stack pointer - mov r5, #4096 - add r6, r6, #8192 - sub r5, r5, #1 - bic sp, r6, r5 - - ; set bootargs - ldr r4, [r7] - ldr r0, [r7, #4] - ldr r1, [r7, #8] - ldr r2, [r7, #12] - mov pc, r4 - ; NOTREACHED - -|infinite_loop| - nop - nop - nop - nop - nop - b |infinite_loop| - ENDP ; |boot| - -|btputc| PROC - adr r1, |$UARTTXBSY| - ldr r1, [r1] -|btputc_busy| - ldr r2, [r1] - and r2, r2, #1 - cmp r2, #1 - beq |btputc_busy| - adr r1, |$UARTTXADR| - ldr r1, [r1] - str r0, [r1] - mov pc, lr - ENDP ;|btputc| - -|hexdump| PROC - stmfd sp!, {r4-r5, lr} - mov r4, r0 - mov r0, #0x30 - bl btputc - mov r0, #0x78 - bl btputc - mov r0, r4 - ; Transmit register address - adr r1, |$UARTTXADR| - ldr r1, [r1] - ; Transmit busy register address - adr r2, |$UARTTXBSY| - ldr r2, [r2] - mov r5, #8 -|hex_loop| - mov r3, r0, LSR #28 - cmp r3, #9 - addgt r3, r3, #0x41 - 10 - addle r3, r3, #0x30 -|hex_busyloop| - ldr r4, [r2] - and r4, r4, #1 - cmp r4, #1 - beq |hex_busyloop| - str r3, [r1] - mov r0, r0, LSL #4 - subs r5, r5, #1 - bne |hex_loop| - mov r0, #0x0d - bl btputc - mov r0, #0x0a - bl btputc - ldmfd sp!, {r4-r5, pc} - ENDP ;|hexdump| - -|$UARTTXADR| - DCD 0x80050014 -|$UARTTXBSY| - DCD 0x80050020 - - EXPORT |boot_func_end| [ DATA ] -|boot_func_end| DCD 0x0 - END diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h src/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h 2008-04-29 11:38:33.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h 2008-04-29 11:47:44.000000000 +0900 @@ -75,6 +75,7 @@ void WritebackDCache(void); void InvalidateDCache(void); void WritebackInvalidateDCache(void); +void WritebufferFlush(void); // MMU TLB access void FlushIDTLB(void); @@ -87,6 +88,8 @@ void SetSVCMode(void); void SetSystemMode(void); +extern uint32_t dcachesize; + __END_DECLS #endif // _HPCBOOT_ARM_ARCH_H_ diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_boot.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_boot.cpp --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_boot.cpp 2008-04-29 11:38:33.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_boot.cpp 2008-04-29 11:47:44.000000000 +0900 @@ -69,6 +69,8 @@ args.architecture = ARCHITECTURE_ARM_SA1100; else if (platid_match(&platid, &platid_mask_CPU_ARM_XSCALE_PXA250)) args.architecture = ARCHITECTURE_ARM_PXA250; + else if (platid_match(&platid, &platid_mask_CPU_ARM_XSCALE_PXA270)) + args.architecture = ARCHITECTURE_ARM_PXA270; else return FALSE; @@ -92,6 +94,7 @@ _arch = new SA1100Architecture(_cons, _mem); break; case ARCHITECTURE_ARM_PXA250: + case ARCHITECTURE_ARM_PXA270: _arch = new PXA2X0Architecture(_cons, _mem); break; } diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_console.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_console.cpp --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_console.cpp 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_console.cpp 2008-04-29 11:47:44.000000000 +0900 @@ -50,6 +50,7 @@ break; case ARCHITECTURE_ARM_PXA250: + case ARCHITECTURE_ARM_PXA270: _instance = new PXA2x0Console(mem); break; } diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp 2008-04-29 11:47:44.000000000 +0900 @@ -56,13 +56,13 @@ __BEGIN_DECLS // 2nd bootloader -void boot_func(kaddr_t, kaddr_t, kaddr_t, kaddr_t); -extern char boot_func_end[]; -#define BOOT_FUNC_START reinterpret_cast (boot_func) -#define BOOT_FUNC_END reinterpret_cast (boot_func_end) +void boot_func_pxa2x0(kaddr_t, kaddr_t, kaddr_t, kaddr_t); +extern char boot_func_end_pxa2x0[]; +#define BOOT_FUNC_START reinterpret_cast (boot_func_pxa2x0) +#define BOOT_FUNC_END reinterpret_cast (boot_func_end_pxa2x0) /* jump to 2nd loader */ -void FlatJump(kaddr_t, kaddr_t, kaddr_t, kaddr_t); +void FlatJump_pxa2x0(kaddr_t, kaddr_t, kaddr_t, kaddr_t); __END_DECLS @@ -89,6 +89,10 @@ _mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE); _mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE); + // set D-cache information + dcachesize = 32768 * 2; + DPRINTF((TEXT("D-cache size = %d\n"), dcachesize)); + #ifdef HW_TEST DPRINTF((TEXT("Testing framebuffer.\n"))); testFramebuffer(); @@ -124,8 +128,44 @@ COM_CLR_INTS; \ __END_MACRO + // set ALT_FN_3_OUT at GPIO<99:98> for FFUART + vaddr_t gpio = + _mem->mapPhysicalPage(0x40e00000, 0x1000, PAGE_READWRITE); + VOLATILE_REF(gpio + 0x6c) |= 0xf0; + _mem->unmapPhysicalPage(gpio); + vaddr_t uart = - _mem->mapPhysicalPage(0x40100000, 0x100, PAGE_READWRITE); + _mem->mapPhysicalPage(0x40100000, 0x1000, PAGE_READWRITE); + + /* 8bit, no parity, stop bit = 1 */ + VOLATILE_REF8(uart + 0x0c) = 0x80; + switch (HPC_PREFERENCE.serial_speed) { + default: + case 9600: + VOLATILE_REF8(uart + 0x00) = 96; + VOLATILE_REF8(uart + 0x04) = 0; + break; + case 19200: + VOLATILE_REF8(uart + 0x00) = 48; + VOLATILE_REF8(uart + 0x04) = 0; + break; + case 38400: + VOLATILE_REF8(uart + 0x00) = 24; + VOLATILE_REF8(uart + 0x04) = 0; + break; + case 57600: + VOLATILE_REF8(uart + 0x00) = 16; + VOLATILE_REF8(uart + 0x04) = 0; + break; + case 115200: + VOLATILE_REF8(uart + 0x00) = 8; + VOLATILE_REF8(uart + 0x04) = 0; + break; + } + VOLATILE_REF8(uart + 0x0c) = 0x03; + VOLATILE_REF8(uart + 0x10) = 0x03; + VOLATILE_REF8(uart + 0x08) = 0x00; + VOLATILE_REF8(uart + 0x04) = 0x40; // Don't turn on the enable-UART bit in the IER; this seems to // result in WinCE losing the port (and nothing working later). @@ -184,6 +224,8 @@ WritebackDCache(); SetKMode(1); - FlatJump(info, pvec, sp, _loader_addr); + FlatJump_pxa2x0(info, pvec, sp, _loader_addr); // NOTREACHED + SetKMode(0); + DPRINTF((TEXT("Return from FlatJump_pxa2x0.\n"))); } diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm 2008-04-21 21:44:57.000000000 +0900 @@ -0,0 +1,243 @@ +; $NetBSD$ +; +; Copyright (c) 2001 The NetBSD Foundation, Inc. +; All rights reserved. +; +; This code is derived from software contributed to The NetBSD Foundation +; by UCHIYAMA Yasushi. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; 3. All advertising materials mentioning features or use of this software +; must display the following acknowledgement: +; This product includes software developed by the NetBSD +; Foundation, Inc. and its contributors. +; 4. Neither the name of The NetBSD Foundation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS +; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS +; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; + + AREA |.text|, CODE, PIC + +; +;armasm.exe $(InputPath) +;arm.obj +; + ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack + ; kaddr_t jump) + ; bootinfo boot information block address. + ; pvec page vector of kernel. + ; stack physical address of stack + ; jump physical address of boot function + EXPORT |FlatJump_pxa2x0| +|FlatJump_pxa2x0| PROC + ; disable interrupt + mrs r4, cpsr + orr r4, r4, #0xc0 + msr cpsr, r4 + ; Invalidate I/D-cache. + mcr p15, 0, r4, c7, c7, 0 + mov r4, r4 + sub pc, pc, #4 + ; disable MMU, I/D-Cache, Writebuffer. + ; interrupt vector address is 0xffff0000 + ; 32bit exception handler/address range. + ldr r4, [pc, #20] + ; Disable WB/Cache/MMU + mcr p15, 0, r4, c1, c0, 0 + ; Invalidate TLB entries. + mcr p15, 0, r4, c8, c7, 0 + mov r4, r4 ; wait for it to complete + sub pc, pc, #4 ; branch to next insn + mov pc, r3 + ; NOTREACHED + mov pc, lr + DCD 0x00002030 + ENDP ; |FlatJump_pxa2x0| +; +; UART test +; + ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) + ; + EXPORT |boot_func_pxa2x0| +|boot_func_pxa2x0| PROC + nop ; cop15 hazard + nop ; cop15 hazard + nop ; cop15 hazard + mov sp, r2 ; set bootloader stack + bl boot_pxa2x0 + nop ; NOTREACHED + nop + ENDP ; |boot_func_pxa2x0| + + EXPORT |boot_pxa2x0| +|boot_pxa2x0| PROC + mov r4, r0 + mov r5, r1 + +; +; UART test code +; +; ; print boot_info address (r0) and page_vector start address (r1). +; mov r0, #'I' +; bl btputc +; mov r0, r4 +; bl hexdump +; mov r0, #'P' +; bl btputc +; mov r0, r5 +; bl hexdump + + mov r7, r4 + mov r2, r5 ; start +|page_loop| + mvn r0, #0 ; ~0 + cmp r2, r0 + beq |page_end| ; if (next == ~0) goto page_end + + mov r1, r2 ; p = next + ldr r2, [r1] ; next + ldr r3, [r1, #4] ; src + ldr r4, [r1, #8] ; dst + ldr r5, [r1, #12] ; sz + + bic r4, r4, #0xff000000 + orr r4, r4, #0xa0000000 + + cmp r3, r0 + add r6, r4, r5 ; end address + bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 + + mov r0, #0 +|page_memset| ; memset (dst, 0, sz) uncached. + str r0, [r4], #4 + cmp r4, r6 + blt |page_memset| + b |page_loop| + +|page_memcpy4| ; memcpy (dst, src, sz) uncached. + ldr r0, [r3], #4 + ldr r5, [r3], #4 + str r0, [r4], #4 + cmp r4, r6 + strlt r5, [r4], #4 + cmplt r4, r6 + blt |page_memcpy4| + + b |page_loop| +|page_end| + ; + ; jump to kernel + ; +; mov r0, #'E' +; bl btputc +; ldr r0, [r7] +; bl hexdump + + ; set stack pointer + mov r5, #4096 + add r6, r6, #8192 + sub r5, r5, #1 + bic sp, r6, r5 + + ; set bootargs + ldr r4, [r7] + ldr r0, [r7, #4] + ldr r1, [r7, #8] + ldr r2, [r7, #12] + bic r4, r4, #0xff000000 + orr r4, r4, #0xa0000000 + mov pc, r4 + ; NOTREACHED + +|infinite_loop| + nop + nop + nop + nop + nop + b |infinite_loop| + ENDP ; |boot| + +|btputc| PROC + adr r1, |$UARTTXBSY| + ldr r1, [r1] +|btputc_busy| + ldr r2, [r1] + ands r2, r2, #0x20 + beq |btputc_busy| + adr r1, |$UARTTXADR| + ldr r1, [r1] + str r0, [r1] + adr r1, |$UARTINTR| + ldr r1, [r1] + mov pc, lr + ENDP ;|btputc| + +|hexdump| PROC + stmfd sp!, {r4-r5, lr} + mov r4, r0 + mov r0, #0x30 + bl btputc + mov r0, #0x78 + bl btputc + mov r0, r4 + ; Transmit register address + adr r1, |$UARTTXADR| + ldr r1, [r1] + ; Transmit busy register address + adr r2, |$UARTTXBSY| + ldr r2, [r2] + mov r5, #8 +|hex_loop| + mov r3, r0, LSR #28 + cmp r3, #9 + addgt r3, r3, #0x41 - 10 + addle r3, r3, #0x30 +|hex_busyloop| + ldr r4, [r2] + ands r4, r4, #0x20 + beq |hex_busyloop| + str r3, [r1] + adr r4, |$UARTINTR| + ldr r4, [r4] + mov r0, r0, LSL #4 + subs r5, r5, #1 + bne |hex_loop| + mov r0, #0x0d + bl btputc + mov r0, #0x0a + bl btputc + ldmfd sp!, {r4-r5, pc} + ENDP ;|hexdump| + + ; FFUART +|$UARTTXADR| + DCD 0x40100000 +|$UARTTXBSY| + DCD 0x40100014 +|$UARTINTR| + DCD 0x40100008 + + EXPORT |boot_func_end_pxa2x0| [ DATA ] +|boot_func_end_pxa2x0| DCD 0x0 + + END diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h 2008-03-08 11:26:03.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h 2008-04-18 15:11:02.000000000 +0900 @@ -71,8 +71,16 @@ public: virtual BOOL init(void) { +#if 0 if (!SerialConsole::init()) return FALSE; +#endif + + // set ALT_FN_3_OUT at GPIO<99:98> for FFUART + vaddr_t gpio = + _mem->mapPhysicalPage(0x40e00000, 0x1000, PAGE_READWRITE); + *(volatile uint32_t *)(gpio + 0x6c) |= 0xf0; + _mem->unmapPhysicalPage(gpio); _uart_base = _mem->mapPhysicalPage(0x40100000, 0x100, PAGE_READWRITE); @@ -80,6 +88,36 @@ if (_uart_base == ~0) return FALSE; + /* 8bit, no parity, stop bit = 1 */ + VOLATILE_REF8(_uart_base + 0x0c) = 0x80; + switch (HPC_PREFERENCE.serial_speed) { + default: + case 9600: + VOLATILE_REF8(_uart_base + 0x00) = 96; + VOLATILE_REF8(_uart_base + 0x04) = 0; + break; + case 19200: + VOLATILE_REF8(_uart_base + 0x00) = 48; + VOLATILE_REF8(_uart_base + 0x04) = 0; + break; + case 38400: + VOLATILE_REF8(_uart_base + 0x00) = 24; + VOLATILE_REF8(_uart_base + 0x04) = 0; + break; + case 57600: + VOLATILE_REF8(_uart_base + 0x00) = 16; + VOLATILE_REF8(_uart_base + 0x04) = 0; + break; + case 115200: + VOLATILE_REF8(_uart_base + 0x00) = 8; + VOLATILE_REF8(_uart_base + 0x04) = 0; + break; + } + VOLATILE_REF8(_uart_base + 0x0c) = 0x03; + VOLATILE_REF8(_uart_base + 0x10) = 0x03; + VOLATILE_REF8(_uart_base + 0x08) = 0x00; + VOLATILE_REF8(_uart_base + 0x04) = 0x40; + return TRUE; } }; diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp 2008-04-29 11:47:44.000000000 +0900 @@ -56,13 +56,13 @@ __BEGIN_DECLS // 2nd bootloader -void boot_func(kaddr_t, kaddr_t, kaddr_t, kaddr_t); -extern char boot_func_end[]; -#define BOOT_FUNC_START reinterpret_cast (boot_func) -#define BOOT_FUNC_END reinterpret_cast (boot_func_end) +void boot_func_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t); +extern char boot_func_end_sa1100[]; +#define BOOT_FUNC_START reinterpret_cast (boot_func_sa1100) +#define BOOT_FUNC_END reinterpret_cast (boot_func_end_sa1100) /* jump to 2nd loader */ -void FlatJump(kaddr_t, kaddr_t, kaddr_t, kaddr_t); +void FlatJump_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t); __END_DECLS @@ -89,6 +89,10 @@ _mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE); _mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE); + // set D-cache information + dcachesize = 8192; + DPRINTF((TEXT("D-cache size = %d\n"), dcachesize)); + return TRUE; } @@ -180,6 +184,6 @@ WritebackDCache(); SetKMode(1); - FlatJump(info, pvec, sp, _loader_addr); + FlatJump_sa1100(info, pvec, sp, _loader_addr); // NOTREACHED } diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm --- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm 2008-04-18 16:35:04.000000000 +0900 @@ -0,0 +1,270 @@ +; $NetBSD$ +; +; Copyright (c) 2001 The NetBSD Foundation, Inc. +; All rights reserved. +; +; This code is derived from software contributed to The NetBSD Foundation +; by UCHIYAMA Yasushi. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; 3. All advertising materials mentioning features or use of this software +; must display the following acknowledgement: +; This product includes software developed by the NetBSD +; Foundation, Inc. and its contributors. +; 4. Neither the name of The NetBSD Foundation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS +; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS +; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; + +; +;armasm.exe $(InputPath) +;arm.obj +; + + AREA |.text|, CODE, PIC + + ; FlatJump_sa1100 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack + ; kaddr_t jump) + ; bootinfo boot information block address. + ; pvec page vector of kernel. + ; stack physical address of stack + ; jump physical address of boot function + ; *** MMU and pipeline behavier are SA-1100 specific. *** + EXPORT |FlatJump_sa1100| +|FlatJump_sa1100| PROC + ; disable interrupt + mrs r4, cpsr + orr r4, r4, #0xc0 + msr cpsr, r4 + ; disable MMU, I/D-Cache, Writebuffer. + ; interrupt vector address is 0xffff0000 + ; 32bit exception handler/address range. + ldr r4, [pc, #24] + ; Disable WB/Cache/MMU + mcr p15, 0, r4, c1, c0, 0 + ; Invalidate I/D-cache. + mcr p15, 0, r4, c7, c7, 0 ; Fetch translated fetch + ; Invalidate TLB entries. + mcr p15, 0, r4, c8, c7, 0 ; Fetch translated decode + ; jump to kernel entry physical address. + mov pc, r3 ; Fetch translated execute + ; NOTREACHED + nop ; Fetch nontranslated cache access + nop ; Fetch nontranslated writeback + mov pc, lr ; Fetch nontranslated + DCD 0x00002030 + ENDP ; |FlatJump_sa1100| +; +; UART test +; + ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) + ; + EXPORT |boot_func_sa1100| +|boot_func_sa1100| PROC + nop ; Cop15 hazard + nop ; Cop15 hazard + nop ; Cop15 hazard + mov sp, r2 ; set bootloader stack +; mov r4, r0 +; mov r5, r1 +; bl colorbar +; mov r0, r4 +; mov r1, r5 + bl boot_sa1100 + nop ; NOTREACHED + nop + ENDP ; |boot_func_sa1100| + + EXPORT |colorbar| +|colorbar| PROC + stmfd sp!, {r4-r7, lr} + adr r4, |$FBADDR| + ldr r4, [r4] + + mov r7, #8 + add r0, r0, r7 +|color_loop| + mov r6, r0 + and r6, r6, #7 + orr r6, r6, r6, LSL #8 + orr r6, r6, r6, LSL #16 + add r5, r4, #0x9600 +|fb_loop| + str r6, [r4], #4 + cmp r4, r5 + blt |fb_loop| + + subs r7, r7, #1 + bne |color_loop| + + ldmfd sp!, {r4-r7, pc} +|$FBADDR| + DCD 0xc0003000 ; use WindowsCE default. + ENDP ; |colorbar| + + EXPORT |boot_sa1100| +|boot_sa1100| PROC +; +; UART test code +; +; ; print boot_info address (r0) and page_vector start address (r1). +; mov r4, r0 +; mov r5, r1 +; mov r0, #'I' +; bl btputc +; mov r0, r4 +; bl hexdump +; mov r0, #'P' +; bl btputc +; mov r0, r5 +; bl hexdump +; mov r7, r4 +; mov r2, r5 ; start + + mov r7, r0 ; if enabled above debug print, remove this. + mov r2, r1 ; if enabled above debug print, remove this. +|page_loop| + mvn r0, #0 ; ~0 + cmp r2, r0 + beq |page_end| ; if (next == ~0) goto page_end + + mov r1, r2 ; p = next + ldr r2, [r1] ; next + ldr r3, [r1, #4] ; src + ldr r4, [r1, #8] ; dst + ldr r5, [r1, #12] ; sz + + cmp r3, r0 + add r6, r4, r5 ; end address + bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 + + mov r0, #0 +|page_memset| ; memset (dst, 0, sz) uncached. + str r0, [r4], #4 + cmp r4, r6 + blt |page_memset| + b |page_loop| + +|page_memcpy4| ; memcpy (dst, src, sz) uncached. + ldr r0, [r3], #4 + ldr r5, [r3], #4 + str r0, [r4], #4 + cmp r4, r6 + strlt r5, [r4], #4 + cmplt r4, r6 + blt |page_memcpy4| + + b |page_loop| +|page_end| + ; + ; jump to kernel + ; +; mov r0, #'E' +; bl btputc +; ldr r0, [r7] +; bl hexdump +; ldr r0, [r7] +; ldr r0, [r0] +; bl hexdump + + ; set stack pointer + mov r5, #4096 + add r6, r6, #8192 + sub r5, r5, #1 + bic sp, r6, r5 + + ; set bootargs + ldr r4, [r7] + ldr r0, [r7, #4] + ldr r1, [r7, #8] + ldr r2, [r7, #12] + mov pc, r4 + ; NOTREACHED + +|infinite_loop| + nop + nop + nop + nop + nop + b |infinite_loop| + ENDP ; |boot| + +|btputc| PROC + adr r1, |$UARTTXBSY| + ldr r1, [r1] +|btputc_busy| + ldr r2, [r1] + and r2, r2, #1 + cmp r2, #1 + beq |btputc_busy| + adr r1, |$UARTTXADR| + ldr r1, [r1] + str r0, [r1] + mov pc, lr + ENDP ;|btputc| + +|hexdump| PROC + stmfd sp!, {r4-r5, lr} + mov r4, r0 + mov r0, #0x30 + bl btputc + mov r0, #0x78 + bl btputc + mov r0, r4 + ; Transmit register address + adr r1, |$UARTTXADR| + ldr r1, [r1] + ; Transmit busy register address + adr r2, |$UARTTXBSY| + ldr r2, [r2] + mov r5, #8 +|hex_loop| + mov r3, r0, LSR #28 + cmp r3, #9 + addgt r3, r3, #0x41 - 10 + addle r3, r3, #0x30 +|hex_busyloop| + ldr r4, [r2] + and r4, r4, #1 + cmp r4, #1 + beq |hex_busyloop| + str r3, [r1] + mov r0, r0, LSL #4 + subs r5, r5, #1 + bne |hex_loop| + mov r0, #0x0d + bl btputc + mov r0, #0x0a + bl btputc + ldmfd sp!, {r4-r5, pc} + ENDP ;|hexdump| + +|$UARTTXADR| + DCD 0x80050014 +|$UARTTXBSY| + DCD 0x80050020 + + EXPORT |boot_func_end_sa1100| [ DATA ] +|boot_func_end_sa1100| DCD 0x0 + + END diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.config src/sys/arch/hpc/stand/hpcboot/hpcboot.config --- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.config 2008-03-15 10:56:37.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/hpcboot.config 2008-04-18 15:49:30.000000000 +0900 @@ -42,6 +42,8 @@ arm\arm_boot.cpp arm\arm_mmu.cpp arm\arm.asm + arm\arm_sa1100_asm.asm + arm\arm_pxa2x0_asm.asm ' SRCFILE_LIST_SH3=' sh3\sh_arch.cpp diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.h src/sys/arch/hpc/stand/hpcboot/hpcboot.h --- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.h 2008-04-29 11:38:33.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/hpcboot.h 2008-04-29 11:47:44.000000000 +0900 @@ -46,6 +46,7 @@ #ifdef ARM ARCHITECTURE_ARM_SA1100 = PLATID_CPU_ARM_STRONGARM_SA1100, ARCHITECTURE_ARM_PXA250 = PLATID_CPU_ARM_XSCALE_PXA250, + ARCHITECTURE_ARM_PXA270 = PLATID_CPU_ARM_XSCALE_PXA270, #endif #ifdef SHx ARCHITECTURE_SH3_7707 = PLATID_CPU_SH_3_7707, diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj --- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj 2008-04-18 15:42:10.000000000 +0900 @@ -0,0 +1,412 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.CPU0610.nonaka.user src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.CPU0610.nonaka.user --- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.CPU0610.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.CPU0610.nonaka.user 2008-04-18 16:32:42.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.TPX40.nonaka.user src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.TPX40.nonaka.user --- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.TPX40.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/hpcboot.vcproj.TPX40.nonaka.user 2008-04-30 22:59:02.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/menu/menu.cpp src/sys/arch/hpc/stand/hpcboot/menu/menu.cpp --- src.orig/sys/arch/hpc/stand/hpcboot/menu/menu.cpp 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/menu/menu.cpp 2008-04-29 11:47:45.000000000 +0900 @@ -41,6 +41,11 @@ #include +#define SCALEX(x) (((x) * dpix) / 96/*DPI*/) +#define SCALEY(y) (((y) * dpiy) / 96/*DPI*/) +#define UNSCALEX(x) (((x) * 96) / dpix) +#define UNSCALEY(y) (((y) * 96) / dpiy) + TabWindow * TabWindowBase::boot(int id) { @@ -208,6 +213,8 @@ HDC hdc = GetDC(0); int width = GetDeviceCaps(hdc, HORZRES); int height = GetDeviceCaps(hdc, VERTRES); + int dpix = GetDeviceCaps(hdc, LOGPIXELSX); + int dpiy = GetDeviceCaps(hdc, LOGPIXELSY); ReleaseDC(0, hdc); // set origin @@ -222,17 +229,23 @@ HWND h; h = GetDlgItem(_window, IDC_MAIN_OPTION_V); - SetWindowPos(h, 0, x, y, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x), SCALEY(y), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); h = GetDlgItem(_window, IDC_MAIN_OPTION_S); - SetWindowPos(h, 0, x, y + 20, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 20), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); h = GetDlgItem(_window, IDC_MAIN_OPTION_A); - SetWindowPos(h, 0, x, y + 40, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 40), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); h = GetDlgItem(_window, IDC_MAIN_OPTION_D); - SetWindowPos(h, 0, x, y + 60, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 60), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); h = GetDlgItem(_window, IDC_MAIN_OPTION_H); - SetWindowPos(h, 0, x, y + 80, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 80), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); h = GetDlgItem(_window, IDC_MAIN_OPTION_H_SPEED); - SetWindowPos(h, 0, x + 100, y + 80, 120, 10, SWP_NOSIZE | SWP_NOZORDER); + SetWindowPos(h, 0, SCALEX(x + 100), SCALEY(y + 80), + SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER); } void @@ -298,13 +311,18 @@ OptionTabWindow::init(HWND w) { struct HpcMenuInterface::HpcMenuPreferences &pref = HPC_PREFERENCE; + HDC hdc = GetDC(0); + int dpix = GetDeviceCaps(hdc, LOGPIXELSX); + int dpiy = GetDeviceCaps(hdc, LOGPIXELSY); + ReleaseDC(0, hdc); _window = w; TabWindow::init(_window); _spin_edit = GetDlgItem(_window, IDC_OPT_AUTO_INPUT); _spin = CreateUpDownControl(WS_CHILD | WS_BORDER | WS_VISIBLE | - UDS_SETBUDDYINT | UDS_ALIGNRIGHT, 80, 0, 50, 50, _window, + UDS_SETBUDDYINT | UDS_ALIGNRIGHT, + SCALEX(80), SCALEY(0), SCALEX(50), SCALEY(50), _window, IDC_OPT_AUTO_UPDOWN, _app._instance, _spin_edit, 60, 1, 30); BOOL onoff = pref.auto_boot ? TRUE : FALSE; EnableWindow(_spin_edit, onoff); @@ -426,12 +444,18 @@ void ConsoleTabWindow::init(HWND w) { + HDC hdc = GetDC(0); + int dpix = GetDeviceCaps(hdc, LOGPIXELSX); + int dpiy = GetDeviceCaps(hdc, LOGPIXELSY); + ReleaseDC(0, hdc); + // at this time _window is NULL. // use argument of window procedure. TabWindow::init(w); _edit = GetDlgItem(w, IDC_CONS_EDIT); - MoveWindow(_edit, 5, 60, _rect.right - _rect.left - 10, - _rect.bottom - _rect.top - 60, TRUE); + MoveWindow(_edit, SCALEX(5), SCALEY(60), + SCALEX(UNSCALEX(_rect.right - _rect.left) - 10), + SCALEY(UNSCALEY(_rect.bottom - _rect.top) - 60), TRUE); Edit_FmtLines(_edit, TRUE); // log file. diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/res/hpcmenu.rc src/sys/arch/hpc/stand/hpcboot/res/hpcmenu.rc --- src.orig/sys/arch/hpc/stand/hpcboot/res/hpcmenu.rc 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/res/hpcmenu.rc 2008-04-29 11:47:45.000000000 +0900 @@ -53,6 +53,8 @@ IDS_DIR_CARD_JP1 L"\\\xFF92\xFF93\xFF98 \xFF76\xFF70\xFF84\xFF9E1\\" IDS_DIR_CARD_JP2 L"\\\xFF92\xFF93\xFF98 \xFF76\xFF70\xFF84\xFF9E2\\" IDS_DIR_CARD_MMCARD "\\Multimedia Card\\" + IDS_DIR_CARD_MINISD_JP L"\\miniSD\xFF76\xFF70\xFF84\xFF9E\\" + IDS_DIR_CARD_MICROSD_JP L"\\microSD\xFF76\xFF70\xFF84\xFF9E\\" IDS_DIR_USER_DEFINED "user defined" } diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot/res/resource.h src/sys/arch/hpc/stand/hpcboot/res/resource.h --- src.orig/sys/arch/hpc/stand/hpcboot/res/resource.h 2008-04-29 11:38:34.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot/res/resource.h 2008-04-29 11:47:45.000000000 +0900 @@ -121,7 +121,9 @@ #define IDS_DIR_CARD_JP1 10020 #define IDS_DIR_CARD_JP2 10022 #define IDS_DIR_CARD_MMCARD 10024 -#define IDS_DIR_USER_DEFINED 10026 +#define IDS_DIR_CARD_MINISD_JP 10026 +#define IDS_DIR_CARD_MICROSD_JP 10028 +#define IDS_DIR_USER_DEFINED 10030 #define IDS_DIR_START IDS_DIR_FFS_ROOT1 Binary files src.orig/sys/arch/hpc/stand/hpcboot.ncb and src/sys/arch/hpc/stand/hpcboot.ncb differ diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/hpcboot.sln src/sys/arch/hpc/stand/hpcboot.sln --- src.orig/sys/arch/hpc/stand/hpcboot.sln 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/hpcboot.sln 2008-04-11 18:18:58.000000000 +0900 @@ -0,0 +1,42 @@ + +Microsoft Visual Studio Solution File, Format Version 9.00 +# Visual Studio 2005 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "hpcboot", "hpcboot\hpcboot.vcproj", "{C23B9696-8B04-4802-BFCF-B7CA78449458}" + ProjectSection(ProjectDependencies) = postProject + {EA178C60-A07C-47C8-97CC-A17511D7944A} = {EA178C60-A07C-47C8-97CC-A17511D7944A} + {2A044694-7027-4826-878F-A135F130EC1A} = {2A044694-7027-4826-878F-A135F130EC1A} + EndProjectSection +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "libsa", "libsa\libsa.vcproj", "{2A044694-7027-4826-878F-A135F130EC1A}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "libz", "libz\libz.vcproj", "{EA178C60-A07C-47C8-97CC-A17511D7944A}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {C23B9696-8B04-4802-BFCF-B7CA78449458}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {2A044694-7027-4826-878F-A135F130EC1A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Debug|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).ActiveCfg = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Build.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + {EA178C60-A07C-47C8-97CC-A17511D7944A}.Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I).Deploy.0 = Release|Windows Mobile 5.0 Pocket PC SDK (ARMV4I) + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal Binary files src.orig/sys/arch/hpc/stand/hpcboot.suo and src/sys/arch/hpc/stand/hpcboot.suo differ diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj src/sys/arch/hpc/stand/libsa/libsa.vcproj --- src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libsa/libsa.vcproj 2008-04-14 18:09:10.000000000 +0900 @@ -0,0 +1,230 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj.CPU0610.nonaka.user src/sys/arch/hpc/stand/libsa/libsa.vcproj.CPU0610.nonaka.user --- src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj.CPU0610.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libsa/libsa.vcproj.CPU0610.nonaka.user 2008-04-18 15:42:10.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj.TPX40.nonaka.user src/sys/arch/hpc/stand/libsa/libsa.vcproj.TPX40.nonaka.user --- src.orig/sys/arch/hpc/stand/libsa/libsa.vcproj.TPX40.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libsa/libsa.vcproj.TPX40.nonaka.user 2008-04-30 22:59:02.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libz/libz.vcproj src/sys/arch/hpc/stand/libz/libz.vcproj --- src.orig/sys/arch/hpc/stand/libz/libz.vcproj 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libz/libz.vcproj 2008-04-14 18:10:44.000000000 +0900 @@ -0,0 +1,222 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libz/libz.vcproj.CPU0610.nonaka.user src/sys/arch/hpc/stand/libz/libz.vcproj.CPU0610.nonaka.user --- src.orig/sys/arch/hpc/stand/libz/libz.vcproj.CPU0610.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libz/libz.vcproj.CPU0610.nonaka.user 2008-04-18 15:42:10.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + diff --exclude=CVS --exclude='obj.*' --exclude=compile -uNr src.orig/sys/arch/hpc/stand/libz/libz.vcproj.TPX40.nonaka.user src/sys/arch/hpc/stand/libz/libz.vcproj.TPX40.nonaka.user --- src.orig/sys/arch/hpc/stand/libz/libz.vcproj.TPX40.nonaka.user 1970-01-01 09:00:00.000000000 +0900 +++ src/sys/arch/hpc/stand/libz/libz.vcproj.TPX40.nonaka.user 2008-04-30 22:59:02.000000000 +0900 @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + +