--- src.orig/sys/sys/cdefs.h	2009-01-15 13:41:25.000000000 +0900
+++ src/sys/sys/cdefs.h	2009-01-15 13:45:56.000000000 +0900
@@ -221,6 +221,10 @@
 #define	__packed	/* delete */
 #define	__aligned(x)	/* delete */
 #define	__section(x)	/* delete */
+#elif defined(_MSC_VER)
+#define	__packed	/* XXX ignore for now */
+#define	__aligned(x)   	/* XXX ignore for now */
+#define	__section(x)   	/* XXX ignore for now */
 #else
 #define	__packed	error: no __packed for this compiler
 #define	__aligned(x)	error: no __aligned for this compiler
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm.asm
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm.asm	2008-05-08 20:40:50.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm.asm	2008-05-17 00:23:35.000000000 +0900
@@ -33,10 +33,13 @@
 ;arm.obj
 ;
 	; dummy buffer for WritebackDCache
+	EXPORT	|dcachesize|	[DATA]
 	EXPORT	|dcachebuf|	[DATA]
 	AREA	|.data|, DATA
+|dcachesize|
+	DCD	8192	; for SA1100
 |dcachebuf|
-	%	8192	; D-cache size
+	%	65536	; max D-cache size
 
 	AREA	|.text|, CODE, PIC
 
@@ -91,14 +94,17 @@
 
 	EXPORT	|WritebackDCache|
 |WritebackDCache| PROC
-	ldr	r0, [pc, #16]	; dcachebuf
-	add	r1, r0, #8192	; cache-size is 8Kbyte.
+	ldr	r0, [pc, #24]	; dcachebuf
+	ldr	r1, [pc, #24]
+	ldr	r1, [r1]	; dcache-size
+	add	r1, r1, r0
 |wbdc1|
 	ldr	r2, [r0], #32	; line-size is 32byte.
 	teq	r1, r0
 	bne	|wbdc1|
 	mov	pc, lr
 	DCD	|dcachebuf|
+	DCD	|dcachesize|
 	ENDP  ; |WritebackDCache|
 
 	EXPORT	|InvalidateDCache|
@@ -112,8 +118,10 @@
 
 	EXPORT	|WritebackInvalidateDCache|
 |WritebackInvalidateDCache| PROC
-	ldr	r0, [pc, #20]	; dcachebuf
-	add	r1, r0, #8192
+	ldr	r0, [pc, #28]	; dcachebuf
+	ldr	r1, [pc, #28]
+	ldr	r1, [r1]	; dcache-size
+	add	r1, r1, r0
 |wbidc1|
 	ldr	r2, [r0], #32
 	teq	r1, r0
@@ -121,6 +129,7 @@
 	mcr	p15, 0, r0, c7, c6, 0
 	mov	pc, lr
 	DCD	|dcachebuf|
+	DCD	|dcachesize|
 	ENDP  ; |WritebackInvalidateDCache|
 
 	;
@@ -276,229 +285,4 @@
 	ENDP  ; |GetCop15Reg14|
 ; Reg15	Test, clock, and idle (W)
 
-	; FlatJump (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack
-	;		kaddr_t jump)
-	;	bootinfo	boot information block address.
-	;	pvec		page vector of kernel.
-	;	stack		physical address of stack
-	;	jump		physical address of boot function
-	; *** MMU and pipeline behavier are SA-1100 specific. ***
-	EXPORT	|FlatJump|
-|FlatJump| PROC
-	; disable interrupt
-	mrs	r4, cpsr
-	orr	r4, r4, #0xc0
-	msr	cpsr, r4
-	; disable MMU, I/D-Cache, Writebuffer.
-	; interrupt vector address is 0xffff0000
-	; 32bit exception handler/address range.
-	ldr	r4, [pc, #24]
-	; Disable WB/Cache/MMU
-	mcr	p15, 0, r4, c1, c0, 0
-	; Invalidate I/D-cache.
-	mcr	p15, 0, r4, c7, c7, 0	; Fetch translated	fetch
-	; Invalidate TLB entries.
-	mcr	p15, 0, r4, c8, c7, 0	; Fetch translated	decode
-	; jump to kernel entry physical address.
-	mov	pc, r3			; Fetch translated	execute
-	; NOTREACHED
-	nop				; Fetch nontranslated	cache access
-	nop				; Fetch nontranslated	writeback
-	mov	pc, lr			; Fetch nontranslated
-	DCD	0x00002030
-	ENDP  ; |FlatJump|
-;
-;	UART test
-;
-	; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags)
-	;
-	EXPORT	|boot_func|
-|boot_func| PROC
-	nop				; Cop15 hazard
-	nop				; Cop15 hazard
-	nop				; Cop15 hazard
-	mov	sp, r2			; set bootloader stack
-;	mov	r4, r0
-;	mov	r5, r1
-;	bl	colorbar
-;	mov	r0, r4
-;	mov	r1, r5
-	bl	boot
-	nop	; NOTREACHED
-	nop
-	ENDP  ; |boot_func|
-
-	EXPORT |colorbar|
-|colorbar| PROC
-	stmfd	sp!, {r4-r7, lr}
-	adr	r4, |$FBADDR|
-	ldr	r4, [r4]
-
-	mov	r7, #8
-	add	r0, r0, r7
-|color_loop|
-	mov	r6, r0
-	and	r6, r6, #7
-	orr	r6, r6, r6, LSL #8
-	orr	r6, r6, r6, LSL #16
-	add	r5, r4, #0x9600
-|fb_loop|
-	str	r6, [r4], #4
-	cmp	r4, r5
-	blt	|fb_loop|
-
-	subs	r7, r7, #1
-	bne	|color_loop|
-
-	ldmfd	sp!, {r4-r7, pc}
-|$FBADDR|
-	DCD	0xc0003000	; use WindowsCE default.
-	ENDP  ; |colorbar|
-
-	EXPORT	|boot|
-|boot| PROC
-;
-;	UART test code
-;
-;	; print boot_info address (r0) and page_vector start address (r1).
-;	mov	r4, r0
-;	mov	r5, r1
-;	mov	r0, #'I'
-;	bl	btputc
-;	mov	r0, r4
-;	bl	hexdump
-;	mov	r0, #'P'
-;	bl	btputc
-;	mov	r0, r5
-;	bl	hexdump
-;	mov	r7, r4
-;	mov	r2, r5		; start
-
-	mov	r7, r0		; if enabled above debug print, remove this.
-	mov	r2, r1		; if enabled above debug print, remove this.
-|page_loop|
-	mvn	r0, #0		; ~0
-	cmp	r2, r0
-	beq	|page_end|	; if (next == ~0) goto page_end
-
-	mov	r1, r2		; p = next
-	ldr	r2, [r1]	; next
-	ldr	r3, [r1, #4]	; src
-	ldr	r4, [r1, #8]	; dst
-	ldr	r5, [r1, #12]	; sz
-
-	cmp	r3, r0
-	add	r6, r4, r5	; end address
-	bne	|page_memcpy4|	; if (src != ~0) goto page_memcpy4
-
-	mov	r0, #0
-|page_memset|			; memset (dst, 0, sz) uncached.
-	str	r0, [r4], #4
-	cmp	r4, r6
-	blt	|page_memset|
-	b	|page_loop|
-
-|page_memcpy4|			; memcpy (dst, src, sz) uncached.
-	ldr	r0, [r3], #4
-	ldr	r5, [r3], #4
-	str	r0, [r4], #4
-	cmp	r4, r6
-	strlt	r5, [r4], #4
-	cmplt	r4, r6
-	blt	|page_memcpy4|
-
-	b	|page_loop|
-|page_end|
-	;
-	; jump to kernel
-	;
-;	mov	r0, #'E'
-;	bl	btputc
-;	ldr	r0, [r7]
-;	bl	hexdump
-;	ldr	r0, [r7]
-;	ldr	r0, [r0]
-;	bl	hexdump	
-
-	; set stack pointer
-	mov	r5, #4096
-	add	r6, r6, #8192
-	sub	r5, r5, #1
-	bic	sp, r6, r5
-
-	; set bootargs
-	ldr	r4, [r7]
-	ldr	r0, [r7, #4]
-	ldr	r1, [r7, #8]
-	ldr	r2, [r7, #12]
-	mov	pc, r4
-	; NOTREACHED
-
-|infinite_loop|
-	nop
-	nop
-	nop
-	nop
-	nop
-	b	|infinite_loop|
-	ENDP  ; |boot|
-
-|btputc| PROC
-	adr	r1, |$UARTTXBSY|
-	ldr	r1, [r1]
-|btputc_busy|
-	ldr	r2, [r1]
-	and	r2, r2, #1
-	cmp	r2, #1
-	beq	|btputc_busy|
-	adr	r1, |$UARTTXADR|
-	ldr	r1, [r1]
-	str	r0, [r1]
-	mov	pc, lr
-	ENDP	;|btputc|
-
-|hexdump| PROC
-	stmfd	sp!, {r4-r5, lr}
-	mov	r4, r0
-	mov	r0, #0x30
-	bl	btputc
-	mov	r0, #0x78
-	bl	btputc
-	mov	r0, r4
-	;	Transmit register address
-	adr	r1, |$UARTTXADR|
-	ldr	r1, [r1]
-	;	Transmit busy register address
-	adr	r2, |$UARTTXBSY|
-	ldr	r2, [r2]
-	mov	r5, #8
-|hex_loop|
-	mov	r3, r0, LSR #28
-	cmp	r3, #9
-	addgt	r3, r3, #0x41 - 10
-	addle	r3, r3, #0x30
-|hex_busyloop|
-	 ldr	r4, [r2]
-	and	r4, r4, #1
-	cmp	r4, #1
-	beq	|hex_busyloop|
-	str	r3, [r1]
-	mov	r0, r0, LSL #4
-	subs	r5, r5, #1
-	bne	|hex_loop|
-	mov	r0, #0x0d
-	bl	btputc
-	mov	r0, #0x0a
-	bl	btputc
-	ldmfd	sp!, {r4-r5, pc}
-	ENDP	;|hexdump|
-
-|$UARTTXADR|
-	DCD	0x80050014
-|$UARTTXBSY|
-	DCD	0x80050020
-
-	EXPORT	|boot_func_end| [ DATA ]
-|boot_func_end|	DCD	0x0
-
 	END
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h src/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h	2008-04-29 11:38:33.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h	2008-05-21 23:48:22.000000000 +0900
@@ -40,10 +40,13 @@
 class ARMArchitecture : public Architecture {
 protected:
 	int _kmode;
-	// test routine for SA-1100 peripherals.
+	// test routine for peripherals.
 	virtual void testFramebuffer(void) = 0;
 	virtual void testUART(void) = 0;
 
+	// dump peripheral regs.
+	virtual void dumpPeripheralRegs(void) = 0;
+
 public:
 	ARMArchitecture(Console *&, MemoryManager *&);
 	virtual ~ARMArchitecture(void);
@@ -75,6 +78,7 @@
 void WritebackDCache(void);
 void InvalidateDCache(void);
 void WritebackInvalidateDCache(void);
+void WritebufferFlush(void);
 
 // MMU TLB access
 void FlushIDTLB(void);
@@ -87,6 +91,8 @@
 void SetSVCMode(void);
 void SetSystemMode(void);
 
+extern uint32_t dcachesize;
+
 __END_DECLS
 
 #endif // _HPCBOOT_ARM_ARCH_H_
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp	2008-04-29 11:38:34.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.cpp	2008-06-05 23:37:52.000000000 +0900
@@ -56,13 +56,13 @@
 __BEGIN_DECLS
 
 // 2nd bootloader
-void boot_func(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
-extern char boot_func_end[];
-#define	BOOT_FUNC_START		reinterpret_cast <vaddr_t>(boot_func)
-#define	BOOT_FUNC_END		reinterpret_cast <vaddr_t>(boot_func_end)
+void boot_func_pxa2x0(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
+extern char boot_func_end_pxa2x0[];
+#define	BOOT_FUNC_START		reinterpret_cast <vaddr_t>(boot_func_pxa2x0)
+#define	BOOT_FUNC_END		reinterpret_cast <vaddr_t>(boot_func_end_pxa2x0)
 
 /* jump to 2nd loader */
-void FlatJump(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
+void FlatJump_pxa2x0(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
 
 __END_DECLS
 
@@ -89,6 +89,10 @@
 	_mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE);
 	_mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE);
 
+	// set D-cache information
+	dcachesize = 32768 * 2;
+	DPRINTF((TEXT("D-cache size = %d\n"), dcachesize));
+
 #ifdef HW_TEST
 	DPRINTF((TEXT("Testing framebuffer.\n")));
 	testFramebuffer();
@@ -97,6 +101,17 @@
 	testUART();
 #endif
 
+#ifdef REGDUMP
+	DPRINTF((TEXT("Dump peripheral registers.\n")));
+	dumpPeripheralRegs();
+#endif
+
+#ifdef CS0DUMP
+	uint32_t dumpsize = 1024 * 1024; // 1MB
+	DPRINTF((TEXT("Dump CS area (size = %d)\n"), dumpsize));
+	dumpCS0(dumpsize);
+#endif
+
 	return TRUE;
 }
 
@@ -124,8 +139,44 @@
 	COM_CLR_INTS;							\
 __END_MACRO
 
+	// set ALT_FN_3_OUT at GPIO<99:98> for FFUART
+	vaddr_t gpio =
+	    _mem->mapPhysicalPage(0x40e00000, 0x1000, PAGE_READWRITE);
+	VOLATILE_REF(gpio + 0x6c) |= 0xf0;
+	_mem->unmapPhysicalPage(gpio);
+
 	vaddr_t uart =
-	    _mem->mapPhysicalPage(0x40100000, 0x100, PAGE_READWRITE);
+	    _mem->mapPhysicalPage(0x40100000, 0x1000, PAGE_READWRITE);
+
+	/* 8bit, no parity, stop bit = 1 */
+	VOLATILE_REF8(uart + 0x0c) = 0x80;
+	switch (HPC_PREFERENCE.serial_speed) {
+	default:
+	case 9600:
+		VOLATILE_REF8(uart + 0x00) = 96;
+		VOLATILE_REF8(uart + 0x04) = 0;
+		break;
+	case 19200:
+		VOLATILE_REF8(uart + 0x00) = 48;
+		VOLATILE_REF8(uart + 0x04) = 0;
+		break;
+	case 38400:
+		VOLATILE_REF8(uart + 0x00) = 24;
+		VOLATILE_REF8(uart + 0x04) = 0;
+		break;
+	case 57600:
+		VOLATILE_REF8(uart + 0x00) = 16;
+		VOLATILE_REF8(uart + 0x04) = 0;
+		break;
+	case 115200:
+		VOLATILE_REF8(uart + 0x00) = 8;
+		VOLATILE_REF8(uart + 0x04) = 0;
+		break;
+	}
+	VOLATILE_REF8(uart + 0x0c) = 0x03;
+	VOLATILE_REF8(uart + 0x10) = 0x03;
+	VOLATILE_REF8(uart + 0x08) = 0x00;
+	VOLATILE_REF8(uart + 0x04) = 0x40;
 
 	// Don't turn on the enable-UART bit in the IER; this seems to
 	// result in WinCE losing the port (and nothing working later).
@@ -184,6 +235,391 @@
 	WritebackDCache();
 
 	SetKMode(1);
-	FlatJump(info, pvec, sp, _loader_addr);
+	FlatJump_pxa2x0(info, pvec, sp, _loader_addr);
 	// NOTREACHED
+	SetKMode(0);
+	DPRINTF((TEXT("Return from FlatJump_pxa2x0.\n")));
+}
+
+
+//
+// dump CS0
+//
+void
+PXA2X0Architecture::dumpCS0(uint32_t size)
+{
+	static char buf[0x1000];
+	vaddr_t mem;
+	uint32_t addr;
+	uint32_t off;
+	HANDLE fh;
+	unsigned long wrote;
+
+	fh = CreateFile(TEXT("rom.bin"), GENERIC_WRITE, FILE_SHARE_READ,
+	    0, OPEN_ALWAYS, FILE_ATTRIBUTE_NORMAL, 0);
+	if (fh == INVALID_HANDLE_VALUE) {
+		DPRINTF((TEXT("can't open file. (%s)\n"), TEXT("rom.bin")));
+		return;
+	}
+
+	for (addr = 0; addr < size; addr += 0x1000) {
+		memset(buf, 0, sizeof(buf));
+		mem = _mem->mapPhysicalPage(addr, 0x1000, PAGE_READWRITE);
+		for (off = 0; off < 0x1000; off++) {
+			buf[off] = VOLATILE_REF8(mem + off);
+		}
+		_mem->unmapPhysicalPage(mem);
+		WriteFile(fh, buf, 0x1000, &wrote, 0);
+	}
+
+	CloseHandle(fh);
+}
+
+//
+// dump peripheral registers.
+//
+
+#ifdef REGDUMP
+#define	PXA250_GPIO_REG_NUM	3
+#define	PXA250_GPIO_NUM		96
+#define	PXA270_GPIO_REG_NUM	4
+#define	PXA270_GPIO_NUM		121
+
+static const TCHAR *pxa270_gpioName[PXA270_GPIO_NUM][7] =
+{
+/*0*/	{ TEXT("GPIO<0>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*1*/	{ TEXT("GPIO<1>/nRESET_GPIO"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*2*/	{ TEXT("SYS_EN5"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*3*/	{ TEXT("GPIO<3>/PWR_SCL"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*4*/	{ TEXT("GPIO<4>/PWR_SDA"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*5*/	{ TEXT("PWR_CAP<0>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*6*/	{ TEXT("PWR_CAP<1>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*7*/	{ TEXT("PWR_CAP<2>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*8*/	{ TEXT("PWR_CAP<3>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*9*/	{ TEXT("GPIO<9>"),TEXT(""),TEXT(""),TEXT("FFCTS"),TEXT("HZ_CLK"),TEXT(""),TEXT("CHOUT<0>"), },
+/*10*/	{ TEXT("GPIO<10>"),TEXT("FFDCD"),TEXT(""),TEXT("USB_P3_57"),TEXT("HZ_CLK"),TEXT(""),TEXT("CHOUT<1>"), },
+/*11*/	{ TEXT("GPIO<11>"),TEXT("EXT_SYNC<0>"),TEXT("SSPRXD2"),TEXT("USB_P3_1"),TEXT("CHOUT<0>"),TEXT("PWM_OUT<2>"),TEXT("48_MHz"), },
+/*12*/	{ TEXT("GPIO<12>"),TEXT("EXT_SYNC<1>"),TEXT("CIF_DD<7>"),TEXT(""),TEXT("CHOUT<1>"),TEXT("PWM_OUT<3>"),TEXT("48_MHz"), },
+/*13*/	{ TEXT("GPIO<13>"),TEXT("CLK_EXT"),TEXT("KP_DKIN<7>"),TEXT("KP_MKIN<7>"),TEXT("SSPTXD2"),TEXT(""),TEXT(""), },
+/*14*/	{ TEXT("GPIO<14>"),TEXT("L_VSYNC"),TEXT("SSPSFRM2"),TEXT(""),TEXT(""),TEXT("SSPSFRM2"),TEXT("UCLK"), },
+/*15*/	{ TEXT("GPIO<15>"),TEXT(""),TEXT(""),TEXT(""),TEXT("nPCE<1>"),TEXT("nCS<1>"),TEXT(""), },
+/*16*/	{ TEXT("GPIO<16>"),TEXT("KP_MKIN<5>"),TEXT(""),TEXT(""),TEXT(""),TEXT("PWM_OUT<0>"),TEXT("FFTXD"), },
+/*17*/	{ TEXT("GPIO<17>"),TEXT("KP_MKIN<6>"),TEXT("CIF_DD<6>"),TEXT(""),TEXT(""),TEXT("PWM_OUT<1>"),TEXT(""), },
+/*18*/	{ TEXT("GPIO<18>"),TEXT("RDY"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*19*/	{ TEXT("GPIO<19>"),TEXT("SSPSCLK2"),TEXT(""),TEXT("FFRXD"),TEXT("SSPSCLK2"),TEXT("L_CS"),TEXT("nURST"), },
+/*20*/	{ TEXT("GPIO<20>"),TEXT("DREQ<0>"),TEXT("MBREQ"),TEXT(""),TEXT("nSDCS<2>"),TEXT(""),TEXT(""), },
+/*21*/	{ TEXT("GPIO<21>"),TEXT(""),TEXT(""),TEXT(""),TEXT("nSDCS<3>"),TEXT("DVAL<0>"),TEXT("MBGNT"), },
+/*22*/	{ TEXT("GPIO<22>"),TEXT("SSPEXTCLK2"),TEXT("SSPSCLK2EN"),TEXT("SSPSCLK2"),TEXT("KP_MKOUT<7>"),TEXT("SSPSYSCLK2"),TEXT("SSPSCLK2"), },
+/*23*/	{ TEXT("GPIO<23>"),TEXT(""),TEXT("SSPSCLK"),TEXT(""),TEXT("CIF_MCLK"),TEXT("SSPSCLK"),TEXT(""), },
+/*24*/	{ TEXT("GPIO<24>"),TEXT("CIF_FV"),TEXT("SSPSFRM"),TEXT(""),TEXT("CIF_FV"),TEXT("SSPSFRM"),TEXT(""), },
+/*25*/	{ TEXT("GPIO<25>"),TEXT("CIF_LV"),TEXT(""),TEXT(""),TEXT("CIF_LV"),TEXT("SSPTXD"),TEXT(""), },
+/*26*/	{ TEXT("GPIO<26>"),TEXT("SSPRXD"),TEXT("CIF_PCLK"),TEXT("FFCTS"),TEXT(""),TEXT(""),TEXT(""), },
+/*27*/	{ TEXT("GPIO<27>"),TEXT("SSPEXTCLK"),TEXT("SSPSCLKEN"),TEXT("CIF_DD<0>"),TEXT("SSPSYSCLK"),TEXT(""),TEXT("FFRTS"), },
+/*28*/	{ TEXT("GPIO<28>"),TEXT("AC97_BITCLK"),TEXT("I2S_BITCLK"),TEXT("SSPSFRM"),TEXT("I2S_BITCLK"),TEXT(""),TEXT("SSPSFRM"), },
+/*29*/	{ TEXT("GPIO<29>"),TEXT("AC97_SDATA_IN_0"),TEXT("I2S_SDATA_IN"),TEXT("SSPSCLK"),TEXT("SSPRXD2"),TEXT(""),TEXT("SSPSCLK"), },
+/*30*/	{ TEXT("GPIO<30>"),TEXT(""),TEXT(""),TEXT(""),TEXT("I2S_SDATA_OUT"),TEXT("AC97_SDATA_OUT"),TEXT("USB_P3_2"), },
+/*31*/	{ TEXT("GPIO<31>"),TEXT(""),TEXT(""),TEXT(""),TEXT("I2S_SYNC"),TEXT("AC97_SYNC"),TEXT("USB_P3_6"), },
+/*32*/	{ TEXT("GPIO<32>"),TEXT(""),TEXT(""),TEXT(""),TEXT("MSSCLK"),TEXT("MMCLK"),TEXT(""), },
+/*33*/	{ TEXT("GPIO<33>"),TEXT("FFRXD"),TEXT("FFDSR"),TEXT(""),TEXT("DVAL<1>"),TEXT("nCS<5>"),TEXT("MBGNT"), },
+/*34*/	{ TEXT("GPIO<34>"),TEXT("FFRXD"),TEXT("KP_MKIN<3>"),TEXT("SSPSCLK3"),TEXT("USB_P2_2"),TEXT(""),TEXT("SSPSCLK3"), },
+/*35*/	{ TEXT("GPIO<35>"),TEXT("FFCTS"),TEXT("USB_P2_1"),TEXT("SSPSFRM3"),TEXT(""),TEXT("KP_MKOUT<6>"),TEXT("SSPTXD3"), },
+/*36*/	{ TEXT("GPIO<36>"),TEXT("FFDCD"),TEXT("SSPSCLK2"),TEXT("KP_MKIN<7>"),TEXT("USB_P2_4"),TEXT("SSPSCLK2"),TEXT(""), },
+/*37*/	{ TEXT("GPIO<37>"),TEXT("FFDSR"),TEXT("SSPSFRM2"),TEXT("KP_MKIN<3>"),TEXT("USB_P2_8"),TEXT("SSPSFRM2"),TEXT("FFTXD"), },
+/*38*/	{ TEXT("GPIO<38>"),TEXT("FFRI"),TEXT("KP_MKIN<4>"),TEXT("USB_P2_3"),TEXT("SSPTXD3"),TEXT("SSPTXD2"),TEXT("PWM_OUT<1>"), },
+/*39*/	{ TEXT("GPIO<39>"),TEXT("KP_MKIN<4>"),TEXT(""),TEXT("SSPSFRM3"),TEXT("USB_P2_6"),TEXT("FFTXD"),TEXT("SSPSFRM3"), },
+/*40*/	{ TEXT("GPIO<40>"),TEXT("SSPRXD2"),TEXT(""),TEXT("USB_P2_5"),TEXT("KP_MKOUT<6>"),TEXT("FFDTR"),TEXT("SSPSCLK3"), },
+/*41*/	{ TEXT("GPIO<41>"),TEXT("FFRXD"),TEXT("USB_P2_7"),TEXT("SSPRXD3"),TEXT("KP_MKOUT<7>"),TEXT("FFRTS"),TEXT(""), },
+/*42*/	{ TEXT("GPIO<42>"),TEXT("BTRXD"),TEXT("ICP_RXD"),TEXT(""),TEXT(""),TEXT(""),TEXT("CIF_MCLK"), },
+/*43*/	{ TEXT("GPIO<43>"),TEXT(""),TEXT(""),TEXT("CIF_FV"),TEXT("ICP_TXD"),TEXT("BTTXD"),TEXT("CIF_FV"), },
+/*44*/	{ TEXT("GPIO<44>"),TEXT("BTCTS"),TEXT(""),TEXT("CIF_LV"),TEXT(""),TEXT(""),TEXT("CIF_LV"), },
+/*45*/	{ TEXT("GPIO<45>"),TEXT(""),TEXT(""),TEXT("CIF_PCLK"),TEXT("AC97_SYSCLK"),TEXT("BTRTS"),TEXT("SSPSYSCLK3"), },
+/*46*/	{ TEXT("GPIO<46>"),TEXT("ICP_RXD"),TEXT("STD_RXD"),TEXT(""),TEXT(""),TEXT("PWM_OUT<2>"),TEXT(""), },
+/*47*/	{ TEXT("GPIO<47>"),TEXT("CIF_DD<0>"),TEXT(""),TEXT(""),TEXT("STD_TXD"),TEXT("ICP_TXD"),TEXT("PWM_OUT<3>"), },
+/*48*/	{ TEXT("GPIO<48>"),TEXT("CIF_DD<5>"),TEXT(""),TEXT(""),TEXT("BB_OB_DAT<1>"),TEXT("nPOE"),TEXT(""), },
+/*49*/	{ TEXT("GPIO<49>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT("nPWE"),TEXT(""), },
+/*50*/	{ TEXT("GPIO<50>"),TEXT("CIF_DD<3>"),TEXT(""),TEXT("SSPSCLK2"),TEXT("BB_OB_DAT<2>"),TEXT("nPIOR"),TEXT("SSPSCLK2"), },
+/*51*/	{ TEXT("GPIO<51>"),TEXT("CIF_DD<2>"),TEXT(""),TEXT(""),TEXT("BB_OB_DAT<3>"),TEXT("nPIOW"),TEXT(""), },
+/*52*/	{ TEXT("GPIO<52>"),TEXT("CIF_DD<4>"),TEXT("SSPSCLK3"),TEXT(""),TEXT("BB_OB_CLK"),TEXT("SSPSCLK3"),TEXT(""), },
+/*53*/	{ TEXT("GPIO<53>"),TEXT("FFRXD"),TEXT("USB_P2_3"),TEXT(""),TEXT("BB_OB_STB"),TEXT("CIF_MCLK"),TEXT("SSPSYSCLK"), },
+/*54*/	{ TEXT("GPIO<54>"),TEXT(""),TEXT("BB_OB_WAIT"),TEXT("CIF_PCLK"),TEXT(""),TEXT("nPCE<2>"),TEXT(""), },
+/*55*/	{ TEXT("GPIO<55>"),TEXT("CIF_DD<1>"),TEXT("BB_IB_DAT<1>"),TEXT(""),TEXT(""),TEXT("nPREG"),TEXT(""), },
+/*56*/	{ TEXT("GPIO<56>"),TEXT("nPWAIT"),TEXT("BB_IB_DAT<2>"),TEXT(""),TEXT("USB_P3_4"),TEXT(""),TEXT(""), },
+/*57*/	{ TEXT("GPIO<57>"),TEXT("nIOIS16"),TEXT("BB_IB_DAT<3>"),TEXT(""),TEXT(""),TEXT(""),TEXT("SSPTXD"), },
+/*58*/	{ TEXT("GPIO<58>"),TEXT(""),TEXT("LDD<0>"),TEXT(""),TEXT(""),TEXT("LDD<0>"),TEXT(""), },
+/*59*/	{ TEXT("GPIO<59>"),TEXT(""),TEXT("LDD<1>"),TEXT(""),TEXT(""),TEXT("LDD<1>"),TEXT(""), },
+/*60*/	{ TEXT("GPIO<60>"),TEXT(""),TEXT("LDD<2>"),TEXT(""),TEXT(""),TEXT("LDD<2>"),TEXT(""), },
+/*61*/	{ TEXT("GPIO<61>"),TEXT(""),TEXT("LDD<3>"),TEXT(""),TEXT(""),TEXT("LDD<3>"),TEXT(""), },
+/*62*/	{ TEXT("GPIO<62>"),TEXT(""),TEXT("LDD<4>"),TEXT(""),TEXT(""),TEXT("LDD<4>"),TEXT(""), },
+/*63*/	{ TEXT("GPIO<63>"),TEXT(""),TEXT("LDD<5>"),TEXT(""),TEXT(""),TEXT("LDD<5>"),TEXT(""), },
+/*64*/	{ TEXT("GPIO<64>"),TEXT(""),TEXT("LDD<6>"),TEXT(""),TEXT(""),TEXT("LDD<6>"),TEXT(""), },
+/*65*/	{ TEXT("GPIO<65>"),TEXT(""),TEXT("LDD<7>"),TEXT(""),TEXT(""),TEXT("LDD<7>"),TEXT(""), },
+/*66*/	{ TEXT("GPIO<66>"),TEXT(""),TEXT("LDD<8>"),TEXT(""),TEXT(""),TEXT("LDD<8>"),TEXT(""), },
+/*67*/	{ TEXT("GPIO<67>"),TEXT(""),TEXT("LDD<9>"),TEXT(""),TEXT(""),TEXT("LDD<9>"),TEXT(""), },
+/*68*/	{ TEXT("GPIO<68>"),TEXT(""),TEXT("LDD<10>"),TEXT(""),TEXT(""),TEXT("LDD<10>"),TEXT(""), },
+/*69*/	{ TEXT("GPIO<69>"),TEXT(""),TEXT("LDD<11>"),TEXT(""),TEXT(""),TEXT("LDD<11>"),TEXT(""), },
+/*70*/	{ TEXT("GPIO<70>"),TEXT(""),TEXT("LDD<12>"),TEXT(""),TEXT(""),TEXT("LDD<12>"),TEXT(""), },
+/*71*/	{ TEXT("GPIO<71>"),TEXT(""),TEXT("LDD<13>"),TEXT(""),TEXT(""),TEXT("LDD<13>"),TEXT(""), },
+/*72*/	{ TEXT("GPIO<72>"),TEXT(""),TEXT("LDD<14>"),TEXT(""),TEXT(""),TEXT("LDD<14>"),TEXT(""), },
+/*73*/	{ TEXT("GPIO<73>"),TEXT(""),TEXT("LDD<15>"),TEXT(""),TEXT(""),TEXT("LDD<15>"),TEXT(""), },
+/*74*/	{ TEXT("GPIO<74>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT("L_FCLK_RD"),TEXT(""), },
+/*75*/	{ TEXT("GPIO<75>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT("L_LCLK_A0"),TEXT(""), },
+/*76*/	{ TEXT("GPIO<76>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT("L_PCLK_WR"),TEXT(""), },
+/*77*/	{ TEXT("GPIO<77>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT("L_BIAS"),TEXT(""), },
+/*78*/	{ TEXT("GPIO<78>"),TEXT(""),TEXT(""),TEXT(""),TEXT("nPCE<2>"),TEXT("nCS<2>"),TEXT(""), },
+/*79*/	{ TEXT("GPIO<79>"),TEXT(""),TEXT(""),TEXT(""),TEXT("PSKTSEL"),TEXT("nCS<3>"),TEXT("PWM_OUT<2>"), },
+/*80*/	{ TEXT("GPIO<80>"),TEXT("DREQ<1>"),TEXT("MBREQ"),TEXT(""),TEXT(""),TEXT("nCS<4>"),TEXT("PWM_OUT<3>"), },
+/*81*/	{ TEXT("GPIO<81>"),TEXT(""),TEXT("CIF_DD<0>"),TEXT(""),TEXT("SSPTXD3"),TEXT("BB_OB_DAT<0>"),TEXT(""), },
+/*82*/	{ TEXT("GPIO<82>"),TEXT("SSPRXD3"),TEXT("BB_IB_DAT<0>"),TEXT("CIF_DD<5>"),TEXT(""),TEXT(""),TEXT("FFDTR"), },
+/*83*/	{ TEXT("GPIO<83>"),TEXT("SSPSFRM3"),TEXT("BB_IB_CLK"),TEXT("CIF_DD<4>"),TEXT("SSPSFRM3"),TEXT("FFTXD"),TEXT("FFRTS"), },
+/*84*/	{ TEXT("GPIO<84>"),TEXT("SSPCLK3"),TEXT("BB_IB_STB"),TEXT("CIF_FV"),TEXT("SSPCLK3"),TEXT(""),TEXT("CIF_FV"), },
+/*85*/	{ TEXT("GPIO<85>"),TEXT("FFRXD"),TEXT("DREQ<2>"),TEXT("CIF_LV"),TEXT("nPCE<1>"),TEXT("BB_IB_WAIT"),TEXT("CIF_LV"), },
+/*86*/	{ TEXT("GPIO<86>"),TEXT("SSPRXD2"),TEXT("LDD<16>"),TEXT("USB_P3_5"),TEXT("nPCE<1>"),TEXT("LDD<16>"),TEXT(""), },
+/*87*/	{ TEXT("GPIO<87>"),TEXT("nPCE<2>"),TEXT("LDD<17>"),TEXT("USB_P3_1"),TEXT("SSPTXD2"),TEXT("LDD<17>"),TEXT("SSPSFRM2"), },
+/*88*/	{ TEXT("GPIO<88>"),TEXT("USBHPWR<1>"),TEXT("SSPRXD2"),TEXT("SSPSFRM2"),TEXT(""),TEXT(""),TEXT("SSPSFRM2"), },
+/*89*/	{ TEXT("GPIO<89>"),TEXT("SSPRXD3"),TEXT(""),TEXT("FFRI"),TEXT("AC97_SYSCLK"),TEXT("USBHPEN<1>"),TEXT("SSPTXD2"), },
+/*90*/	{ TEXT("GPIO<90>"),TEXT("KP_MKIN<5>"),TEXT("USB_P3_5"),TEXT("CIF_DD<4>"),TEXT(""),TEXT("nURST"),TEXT(""), },
+/*91*/	{ TEXT("GPIO<91>"),TEXT("KP_MKIN<6>"),TEXT("USB_P3_1"),TEXT("CIF_DD<5>"),TEXT(""),TEXT("UCLK"),TEXT(""), },
+/*92*/	{ TEXT("GPIO<92>"),TEXT("MMDAT<0>"),TEXT(""),TEXT(""),TEXT("MMDAT<0>"),TEXT("MSBS"),TEXT(""), },
+/*93*/	{ TEXT("GPIO<93>"),TEXT("KP_DKIN<0>"),TEXT("CIF_DD<6>"),TEXT(""),TEXT("AC97_SDATA_OUT"),TEXT(""),TEXT(""), },
+/*94*/	{ TEXT("GPIO<94>"),TEXT("KP_DKIN<1>"),TEXT("CIF_DD<5>"),TEXT(""),TEXT("AC97_SYNC"),TEXT(""),TEXT(""), },
+/*95*/	{ TEXT("GPIO<95>"),TEXT("KP_DKIN<2>"),TEXT("CIF_DD<4>"),TEXT("KP_MKIN<6>"),TEXT("AC97_RESET_n"),TEXT(""),TEXT(""), },
+/*96*/	{ TEXT("GPIO<96>"),TEXT("KP_DKIN<3>"),TEXT("MBREQ"),TEXT("FFRXD"),TEXT(""),TEXT("DVAL<1>"),TEXT("KP_MKOUT<6>"), },
+/*97*/	{ TEXT("GPIO<97>"),TEXT("KP_DKIN<4>"),TEXT("DREQ<1>"),TEXT("KP_MKIN<3>"),TEXT(""),TEXT("MBGNT"),TEXT(""), },
+/*98*/	{ TEXT("GPIO<98>"),TEXT("KP_DKIN<5>"),TEXT("CIF_DD<0>"),TEXT("KP_MKIN<4>"),TEXT("AC97_SYSCLK"),TEXT(""),TEXT("FFRTS"), },
+/*99*/	{ TEXT("GPIO<99>"),TEXT("KP_DKIN<6>"),TEXT("AC97_SDATA_IN_1"),TEXT("KP_MKIN<5>"),TEXT(""),TEXT(""),TEXT("FFTXD"), },
+/*100*/	{ TEXT("GPIO<100>"),TEXT("KP_MKIN<0>"),TEXT("DREQ<2>"),TEXT("FFCTS"),TEXT(""),TEXT(""),TEXT(""), },
+/*101*/	{ TEXT("GPIO<101>"),TEXT("KP_MKIN<1>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*102*/	{ TEXT("GPIO<102>"),TEXT("KP_MKIN<2>"),TEXT(""),TEXT("FFRXD"),TEXT("nPCE<1>"),TEXT(""),TEXT(""), },
+/*103*/	{ TEXT("GPIO<103>"),TEXT("CIF_DD<3>"),TEXT(""),TEXT(""),TEXT(""),TEXT("KP_MKOUT<0>"),TEXT(""), },
+/*104*/	{ TEXT("GPIO<104>"),TEXT("CIF_DD<2>"),TEXT(""),TEXT(""),TEXT("PSKTSEL"),TEXT("KP_MKOUT<1>"),TEXT(""), },
+/*105*/	{ TEXT("GPIO<105>"),TEXT("CIF_DD<1>"),TEXT(""),TEXT(""),TEXT("nPCE<2>"),TEXT("KP_MKOUT<2>"),TEXT(""), },
+/*106*/	{ TEXT("GPIO<106>"),TEXT("CIF_DD<9>"),TEXT(""),TEXT(""),TEXT(""),TEXT("KP_MKOUT<3>"),TEXT(""), },
+/*107*/	{ TEXT("GPIO<107>"),TEXT("CIF_DD<8>"),TEXT(""),TEXT(""),TEXT(""),TEXT("KP_MKOUT<4>"),TEXT(""), },
+/*108*/	{ TEXT("GPIO<108>"),TEXT("CIF_DD<7>"),TEXT(""),TEXT(""),TEXT("CHOUT<0>"),TEXT("KP_MKOUT<5>"),TEXT(""), },
+/*109*/	{ TEXT("GPIO<109>"),TEXT("MMDAT<1>"),TEXT("MSSDIO"),TEXT(""),TEXT("MMDAT<1>"),TEXT("MSSDIO"),TEXT(""), },
+/*110*/	{ TEXT("GPIO<110>"),TEXT("MMDAT<2>/MMCCS<0>"),TEXT(""),TEXT(""),TEXT("MMDAT<2>/MMCCS<0>"),TEXT(""),TEXT(""), },
+/*111*/	{ TEXT("GPIO<111>"),TEXT("MMDAT<3>/MMCCS<1>"),TEXT(""),TEXT(""),TEXT("MMDAT<3>/MMCCS<1>"),TEXT(""),TEXT(""), },
+/*112*/	{ TEXT("GPIO<112>"),TEXT("MMCMD"),TEXT("nMSINS"),TEXT(""),TEXT("MMCMD"),TEXT(""),TEXT(""), },
+/*113*/	{ TEXT("GPIO<113>"),TEXT(""),TEXT(""),TEXT("USB_P3_3"),TEXT("I2S_SYSCLK"),TEXT("AC97_RESET_n"),TEXT(""), },
+/*114*/	{ TEXT("GPIO<114>"),TEXT("CIF_DD<1>"),TEXT(""),TEXT(""),TEXT("UEN"),TEXT("UVS0"),TEXT(""), },
+/*115*/	{ TEXT("GPIO<115>"),TEXT("DREQ<0>"),TEXT("CIF_DD<3>"),TEXT("MBREQ"),TEXT("UEN"),TEXT("nUVS1"),TEXT("PWM_OUT<1>"), },
+/*116*/	{ TEXT("GPIO<116>"),TEXT("CIF_DD<2>"),TEXT("AC97_SDATA_IN_0"),TEXT("UDET"),TEXT("DVAL<0>"),TEXT("nUVS2"),TEXT("MBGNT"), },
+/*117*/	{ TEXT("GPIO<117>"),TEXT("SCL"),TEXT(""),TEXT(""),TEXT("SCL"),TEXT(""),TEXT(""), },
+/*118*/	{ TEXT("GPIO<118>"),TEXT("SDA"),TEXT(""),TEXT(""),TEXT("SDA"),TEXT(""),TEXT(""), },
+/*119*/	{ TEXT("GPIO<119>"),TEXT("USBHPWR<2>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+/*120*/	{ TEXT("GPIO<120>"),TEXT("USBHPEN<2>"),TEXT(""),TEXT(""),TEXT(""),TEXT(""),TEXT(""), },
+};
+#endif
+
+void
+PXA2X0Architecture::dumpPeripheralRegs(void)
+{
+#ifdef REGDUMP
+	uint32_t reg;
+	bool first;
+	int i, n;
+
+#define	GPIO_OFFSET(r,o) ((r == 3) ? (o + 0x100) : (o + (r * 4)))
+	// GPIO
+	if (platid_match(&platid, &platid_mask_CPU_ARM_XSCALE_PXA270))
+		n = PXA270_GPIO_REG_NUM;
+	else
+		n = PXA250_GPIO_REG_NUM;
+
+	vaddr_t gpio =
+	    _mem->mapPhysicalPage(0x40e00000, 0x1000, PAGE_READWRITE);
+	DPRINTF((TEXT("Dump GPIO registers.\n")));
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x00));
+		DPRINTF((TEXT("GPLR%d: 0x%08x\n"), i, reg));
+	}
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x0c));
+		DPRINTF((TEXT("GPDR%d: 0x%08x\n"), i, reg));
+	}
+#if 0	/* write-only register */
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x18));
+		DPRINTF((TEXT("GPSR%d: 0x%08x\n"), reg));
+	}
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x24));
+		DPRINTF((TEXT("GPCR%d: 0x%08x\n"), reg));
+	}
+#endif
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x30));
+		DPRINTF((TEXT("GRER%d: 0x%08x\n"), i, reg));
+	}
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x3c));
+		DPRINTF((TEXT("GFER%d: 0x%08x\n"), i, reg));
+	}
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x48));
+		DPRINTF((TEXT("GEDR%d: 0x%08x\n"), i, reg));
+	}
+	for (i = 0; i < n; i++) {
+		reg = VOLATILE_REF(gpio + 0x54 + (i * 8));
+		DPRINTF((TEXT("GAFR%d_L: 0x%08x\n"), i, reg));
+		reg = VOLATILE_REF(gpio + 0x58 + (i * 8));
+		DPRINTF((TEXT("GAFR%d_U: 0x%08x\n"), i, reg));
+	}
+
+	//
+	// display detail
+	//
+
+	if (!platid_match(&platid, &platid_mask_CPU_ARM_XSCALE_PXA270))
+		return;
+
+	// header
+	DPRINTF((TEXT("pin#,function,name,rising,falling,status\n")));
+
+	n = PXA270_GPIO_NUM;
+	for (i = 0; i < n; i++) {
+		const TCHAR *fn_name, *pin_name;
+		uint32_t dir, altfn, redge, fedge, status;
+
+		// pin function
+		dir = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x0c));
+		dir = (dir >> (i % 32)) & 1;
+		altfn = VOLATILE_REF(gpio + 0x54 + ((i / 16) * 4));
+		altfn = (altfn >> ((i % 16) * 2)) & 3;
+		if (altfn == 0) {
+			if (dir == 0) {
+				fn_name = TEXT("GPIO_IN");
+			} else {
+				fn_name = TEXT("GPIO_OUT");
+			}
+			DPRINTF((TEXT("%d,%s,%s,"), i, fn_name,
+			    pxa270_gpioName[i][0]));
+		} else {
+			if (dir == 0) {
+				fn_name = TEXT("IN");
+				pin_name = pxa270_gpioName[i][altfn];
+			} else {
+				fn_name = TEXT("OUT");
+				pin_name = pxa270_gpioName[i][altfn+3];
+			}
+			DPRINTF((TEXT("%d,ALT_FN_%d_%s,%s,"), i, altfn,
+			    fn_name, pin_name));
+		}
+
+		// edge detect
+		redge = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x30));
+		redge = (redge >> (i % 32)) & 1;
+		fedge = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x3c));
+		fedge = (fedge >> (i % 32)) & 1;
+		DPRINTF((TEXT("%s,%s,"),
+		    redge ? TEXT("enable") : TEXT("disable"),
+		    fedge ? TEXT("enable") : TEXT("disable")));
+
+		// status
+		status = VOLATILE_REF(gpio + GPIO_OFFSET(i, 0x00));
+		status = (status >> (i % 32)) & 1;
+		DPRINTF((TEXT("%s"), status ? TEXT("high") : TEXT("low")));
+
+		DPRINTF((TEXT("\n")));
+	}
+	_mem->unmapPhysicalPage(gpio);
+
+	// LCDC
+	DPRINTF((TEXT("Dump LCDC registers.\n")));
+	vaddr_t lcdc =
+	    _mem->mapPhysicalPage(0x44000000, 0x1000, PAGE_READWRITE);
+	reg = VOLATILE_REF(lcdc + 0x00);
+	DPRINTF((TEXT("LCCR0: 0x%08x\n"), reg));
+	DPRINTF((TEXT("-> ")));
+	first = true;
+	if (reg & (1U << 26)) {
+		DPRINTF((TEXT("%sLDDALT"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 25)) {
+		DPRINTF((TEXT("%sOUC"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 22)) {
+		DPRINTF((TEXT("%sLCDT"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 9)) {
+		DPRINTF((TEXT("%sDPD"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 7)) {
+		DPRINTF((TEXT("%sPAS"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 2)) {
+		DPRINTF((TEXT("%sSDS"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 1)) {
+		DPRINTF((TEXT("%sCMS"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 0)) {
+		DPRINTF((TEXT("%sENB"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	DPRINTF((TEXT("\n")));
+	DPRINTF((TEXT("-> PDD = 0x%02x\n"), (reg >> 12) & 0xff));
+	reg = VOLATILE_REF(lcdc + 0x04);
+	DPRINTF((TEXT("LCCR1: 0x%08x\n"), reg));
+	DPRINTF((TEXT("-> BLW = 0x%02x, ELW = 0x%02x, HSW = 0x%02x, PPL = 0x%03x\n"),
+	    (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 10) & 0x3f,
+	    reg & 0x3ff));
+	reg = VOLATILE_REF(lcdc + 0x08);
+	DPRINTF((TEXT("LCCR2: 0x%08x\n"), reg));
+	DPRINTF((TEXT("-> BFW = 0x%02x, EFW = 0x%02x, VSW = 0x%02x, LPP = 0x%03x\n"),
+	    (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 10) & 0x3f,
+	    reg & 0x3ff));
+	reg = VOLATILE_REF(lcdc + 0x0c);
+	DPRINTF((TEXT("LCCR3: 0x%08x\n"), reg));
+	DPRINTF((TEXT("-> ")));
+	first = true;
+	if (reg & (1U << 27)) {
+		DPRINTF((TEXT("%sDPC"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 23)) {
+		DPRINTF((TEXT("%sOEP"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 22)) {
+		DPRINTF((TEXT("%sPCP"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 21)) {
+		DPRINTF((TEXT("%sHSP"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 20)) {
+		DPRINTF((TEXT("%sVSP"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	if (reg & (1U << 19)) {
+		DPRINTF((TEXT("%sVSP"), first ? TEXT("") : TEXT("/")));
+		first = false;
+	}
+	DPRINTF((TEXT("\n")));
+	DPRINTF((TEXT("-> PDFOR = %d\n"), (reg >> 30) & 3));
+	DPRINTF((TEXT("-> BPP = 0x%02x\n"), ((reg >> 29) & 1 << 3) | ((reg >> 24) & 7)));
+	DPRINTF((TEXT("-> API = 0x%x\n"), (reg >> 16) & 0xf));
+	DPRINTF((TEXT("-> ACB = 0x%02x\n"), (reg >> 8) & 0xff));
+	DPRINTF((TEXT("-> PCD = 0x%02x\n"), reg & 0xff));
+	reg = VOLATILE_REF(lcdc + 0x10);
+	DPRINTF((TEXT("LCCR4: 0x%08x\n"), reg));
+	DPRINTF((TEXT("-> PCDDIV = %d\n"), (reg >> 31) & 1));
+	DPRINTF((TEXT("-> PAL_FOR = %d\n"), (reg >> 15) & 3));
+	DPRINTF((TEXT("-> K3 = 0x%x, K2 = 0x%x, K1 = 0x%x\n"),
+	    (reg >> 6) & 7, (reg >> 3) & 7, reg & 7));
+	reg = VOLATILE_REF(lcdc + 0x14);
+	DPRINTF((TEXT("LCCR5: 0x%08x\n"), reg));
+	reg = VOLATILE_REF(lcdc + 0x54);
+	DPRINTF((TEXT("LCDBSCNTR: 0x%08x\n"), reg));
+	_mem->unmapPhysicalPage(lcdc);
+#endif
 }
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.h src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.h
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.h	2008-04-29 11:38:34.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0.h	2008-06-05 23:37:53.000000000 +0900
@@ -38,6 +38,11 @@
 	virtual void testFramebuffer(void);
 	virtual void testUART(void);
 
+	// dump peripheral regs.
+	virtual void dumpPeripheralRegs(void);
+
+	void dumpCS0(uint32_t size);
+
 public:
 	PXA2X0Architecture(Console *&, MemoryManager *&);
 	virtual ~PXA2X0Architecture(void);
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm	1970-01-01 09:00:00.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm	2008-04-21 21:44:57.000000000 +0900
@@ -0,0 +1,243 @@
+;	$NetBSD$	
+;
+; Copyright (c) 2001 The NetBSD Foundation, Inc.
+; All rights reserved.
+;
+; This code is derived from software contributed to The NetBSD Foundation
+; by UCHIYAMA Yasushi.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions
+; are met:
+; 1. Redistributions of source code must retain the above copyright
+;    notice, this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright
+;    notice, this list of conditions and the following disclaimer in the
+;    documentation and/or other materials provided with the distribution.
+; 3. All advertising materials mentioning features or use of this software
+;    must display the following acknowledgement:
+;        This product includes software developed by the NetBSD
+;        Foundation, Inc. and its contributors.
+; 4. Neither the name of The NetBSD Foundation nor the names of its
+;    contributors may be used to endorse or promote products derived
+;    from this software without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+; PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+; POSSIBILITY OF SUCH DAMAGE.
+;
+
+	AREA	|.text|, CODE, PIC
+
+;
+;armasm.exe $(InputPath)
+;arm.obj
+;
+	; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack
+	;		kaddr_t jump)
+	;	bootinfo	boot information block address.
+	;	pvec		page vector of kernel.
+	;	stack		physical address of stack
+	;	jump		physical address of boot function
+	EXPORT	|FlatJump_pxa2x0|
+|FlatJump_pxa2x0| PROC
+	; disable interrupt
+	mrs	r4, cpsr
+	orr	r4, r4, #0xc0
+	msr	cpsr, r4
+	; Invalidate I/D-cache.
+	mcr	p15, 0, r4, c7, c7, 0
+	mov	r4, r4
+	sub	pc, pc, #4
+	; disable MMU, I/D-Cache, Writebuffer.
+	; interrupt vector address is 0xffff0000
+	; 32bit exception handler/address range.
+	ldr	r4, [pc, #20]
+	; Disable WB/Cache/MMU
+	mcr	p15, 0, r4, c1, c0, 0
+	; Invalidate TLB entries.
+	mcr	p15, 0, r4, c8, c7, 0
+	mov	r4, r4			; wait for it to complete
+	sub	pc, pc, #4		; branch to next insn
+	mov	pc, r3
+	; NOTREACHED
+	mov	pc, lr
+	DCD	0x00002030
+	ENDP  ; |FlatJump_pxa2x0|
+;
+;	UART test
+;
+	; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags)
+	;
+	EXPORT	|boot_func_pxa2x0|
+|boot_func_pxa2x0| PROC
+	nop				; cop15 hazard
+	nop				; cop15 hazard
+	nop				; cop15 hazard
+	mov	sp, r2			; set bootloader stack
+	bl	boot_pxa2x0
+	nop	; NOTREACHED
+	nop
+	ENDP  ; |boot_func_pxa2x0|
+
+	EXPORT	|boot_pxa2x0|
+|boot_pxa2x0| PROC
+	mov	r4, r0
+	mov	r5, r1
+
+;
+;	UART test code
+;
+;	; print boot_info address (r0) and page_vector start address (r1).
+;	mov	r0, #'I'
+;	bl	btputc
+;	mov	r0, r4
+;	bl	hexdump
+;	mov	r0, #'P'
+;	bl	btputc
+;	mov	r0, r5
+;	bl	hexdump
+
+	mov	r7, r4
+	mov	r2, r5		; start
+|page_loop|
+	mvn	r0, #0		; ~0
+	cmp	r2, r0
+	beq	|page_end|	; if (next == ~0) goto page_end
+
+	mov	r1, r2		; p = next
+	ldr	r2, [r1]	; next
+	ldr	r3, [r1, #4]	; src
+	ldr	r4, [r1, #8]	; dst
+	ldr	r5, [r1, #12]	; sz
+
+	bic	r4, r4, #0xff000000
+	orr	r4, r4, #0xa0000000
+
+	cmp	r3, r0
+	add	r6, r4, r5	; end address
+	bne	|page_memcpy4|	; if (src != ~0) goto page_memcpy4
+
+	mov	r0, #0
+|page_memset|			; memset (dst, 0, sz) uncached.
+	str	r0, [r4], #4
+	cmp	r4, r6
+	blt	|page_memset|
+	b	|page_loop|
+
+|page_memcpy4|			; memcpy (dst, src, sz) uncached.
+	ldr	r0, [r3], #4
+	ldr	r5, [r3], #4
+	str	r0, [r4], #4
+	cmp	r4, r6
+	strlt	r5, [r4], #4
+	cmplt	r4, r6
+	blt	|page_memcpy4|
+
+	b	|page_loop|
+|page_end|
+	;
+	; jump to kernel
+	;
+;	mov	r0, #'E'
+;	bl	btputc
+;	ldr	r0, [r7]
+;	bl	hexdump
+
+	; set stack pointer
+	mov	r5, #4096
+	add	r6, r6, #8192
+	sub	r5, r5, #1
+	bic	sp, r6, r5
+
+	; set bootargs
+	ldr	r4, [r7]
+	ldr	r0, [r7, #4]
+	ldr	r1, [r7, #8]
+	ldr	r2, [r7, #12]
+	bic	r4, r4, #0xff000000
+	orr	r4, r4, #0xa0000000
+	mov	pc, r4
+	; NOTREACHED
+
+|infinite_loop|
+	nop
+	nop
+	nop
+	nop
+	nop
+	b	|infinite_loop|
+	ENDP  ; |boot|
+
+|btputc| PROC
+	adr	r1, |$UARTTXBSY|
+	ldr	r1, [r1]
+|btputc_busy|
+	ldr	r2, [r1]
+	ands	r2, r2, #0x20
+	beq	|btputc_busy|
+	adr	r1, |$UARTTXADR|
+	ldr	r1, [r1]
+	str	r0, [r1]
+	adr	r1, |$UARTINTR|
+	ldr	r1, [r1]
+	mov	pc, lr
+	ENDP	;|btputc|
+
+|hexdump| PROC
+	stmfd	sp!, {r4-r5, lr}
+	mov	r4, r0
+	mov	r0, #0x30
+	bl	btputc
+	mov	r0, #0x78
+	bl	btputc
+	mov	r0, r4
+	;	Transmit register address
+	adr	r1, |$UARTTXADR|
+	ldr	r1, [r1]
+	;	Transmit busy register address
+	adr	r2, |$UARTTXBSY|
+	ldr	r2, [r2]
+	mov	r5, #8
+|hex_loop|
+	mov	r3, r0, LSR #28
+	cmp	r3, #9
+	addgt	r3, r3, #0x41 - 10
+	addle	r3, r3, #0x30
+|hex_busyloop|
+	ldr	r4, [r2]
+	ands	r4, r4, #0x20
+	beq	|hex_busyloop|
+	str	r3, [r1]
+	adr	r4, |$UARTINTR|
+	ldr	r4, [r4]
+	mov	r0, r0, LSL #4
+	subs	r5, r5, #1
+	bne	|hex_loop|
+	mov	r0, #0x0d
+	bl	btputc
+	mov	r0, #0x0a
+	bl	btputc
+	ldmfd	sp!, {r4-r5, pc}
+	ENDP	;|hexdump|
+
+	; FFUART
+|$UARTTXADR|
+	DCD	0x40100000
+|$UARTTXBSY|
+	DCD	0x40100014
+|$UARTINTR|
+	DCD	0x40100008
+
+	EXPORT	|boot_func_end_pxa2x0| [ DATA ]
+|boot_func_end_pxa2x0|	DCD	0x0
+
+	END
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h	2008-03-08 11:26:03.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_console.h	2008-04-18 15:11:02.000000000 +0900
@@ -71,8 +71,16 @@
 
 public:
 	virtual BOOL init(void) {
+#if 0
 		if (!SerialConsole::init())
 			return FALSE;
+#endif
+
+		// set ALT_FN_3_OUT at GPIO<99:98> for FFUART
+		vaddr_t gpio =
+		    _mem->mapPhysicalPage(0x40e00000, 0x1000, PAGE_READWRITE);
+		*(volatile uint32_t *)(gpio + 0x6c) |= 0xf0;
+		_mem->unmapPhysicalPage(gpio);
 
 		_uart_base =
 		    _mem->mapPhysicalPage(0x40100000, 0x100, PAGE_READWRITE);
@@ -80,6 +88,36 @@
 		if (_uart_base == ~0)
 			return FALSE;
 
+		/* 8bit, no parity, stop bit = 1 */
+		VOLATILE_REF8(_uart_base + 0x0c) = 0x80;
+		switch (HPC_PREFERENCE.serial_speed) {
+		default:
+		case 9600:
+			VOLATILE_REF8(_uart_base + 0x00) = 96;
+			VOLATILE_REF8(_uart_base + 0x04) = 0;
+			break;
+		case 19200:
+			VOLATILE_REF8(_uart_base + 0x00) = 48;
+			VOLATILE_REF8(_uart_base + 0x04) = 0;
+			break;
+		case 38400:
+			VOLATILE_REF8(_uart_base + 0x00) = 24;
+			VOLATILE_REF8(_uart_base + 0x04) = 0;
+			break;
+		case 57600:
+			VOLATILE_REF8(_uart_base + 0x00) = 16;
+			VOLATILE_REF8(_uart_base + 0x04) = 0;
+			break;
+		case 115200:
+			VOLATILE_REF8(_uart_base + 0x00) = 8;
+			VOLATILE_REF8(_uart_base + 0x04) = 0;
+			break;
+		}
+		VOLATILE_REF8(_uart_base + 0x0c) = 0x03;
+		VOLATILE_REF8(_uart_base + 0x10) = 0x03;
+		VOLATILE_REF8(_uart_base + 0x08) = 0x00;
+		VOLATILE_REF8(_uart_base + 0x04) = 0x40;
+
 		return TRUE;
 	}
 };
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp	2008-04-29 11:38:34.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.cpp	2008-05-21 23:49:07.000000000 +0900
@@ -56,13 +56,13 @@
 __BEGIN_DECLS
 
 // 2nd bootloader
-void boot_func(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
-extern char boot_func_end[];
-#define	BOOT_FUNC_START		reinterpret_cast <vaddr_t>(boot_func)
-#define	BOOT_FUNC_END		reinterpret_cast <vaddr_t>(boot_func_end)
+void boot_func_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
+extern char boot_func_end_sa1100[];
+#define	BOOT_FUNC_START		reinterpret_cast <vaddr_t>(boot_func_sa1100)
+#define	BOOT_FUNC_END		reinterpret_cast <vaddr_t>(boot_func_end_sa1100)
 
 /* jump to 2nd loader */
-void FlatJump(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
+void FlatJump_sa1100(kaddr_t, kaddr_t, kaddr_t, kaddr_t);
 
 __END_DECLS
 
@@ -89,6 +89,10 @@
 	_mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE);
 	_mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE);
 
+	// set D-cache information
+	dcachesize = 8192;
+	DPRINTF((TEXT("D-cache size = %d\n"), dcachesize));
+
 	return TRUE;
 }
 
@@ -134,6 +138,11 @@
 	_mem->unmapPhysicalPage(uart);
 }
 
+void
+SA1100Architecture::dumpPeripheralRegs(void)
+{
+}
+
 BOOL
 SA1100Architecture::setupLoader(void)
 {
@@ -180,6 +189,6 @@
 	WritebackDCache();
 
 	SetKMode(1);
-	FlatJump(info, pvec, sp, _loader_addr);
+	FlatJump_sa1100(info, pvec, sp, _loader_addr);
 	// NOTREACHED
 }
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.h src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.h
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.h	2008-04-29 11:38:34.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100.h	2008-05-21 23:49:09.000000000 +0900
@@ -38,6 +38,9 @@
 	virtual void testFramebuffer(void);
 	virtual void testUART(void);
 
+	// dump peripheral regs.
+	virtual void dumpPeripheralRegs(void);
+
 public:
 	SA1100Architecture(Console *&, MemoryManager *&);
 	virtual ~SA1100Architecture(void);
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm
--- src.orig/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm	1970-01-01 09:00:00.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm	2008-04-18 16:35:04.000000000 +0900
@@ -0,0 +1,270 @@
+;	$NetBSD$	
+;
+; Copyright (c) 2001 The NetBSD Foundation, Inc.
+; All rights reserved.
+;
+; This code is derived from software contributed to The NetBSD Foundation
+; by UCHIYAMA Yasushi.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions
+; are met:
+; 1. Redistributions of source code must retain the above copyright
+;    notice, this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright
+;    notice, this list of conditions and the following disclaimer in the
+;    documentation and/or other materials provided with the distribution.
+; 3. All advertising materials mentioning features or use of this software
+;    must display the following acknowledgement:
+;        This product includes software developed by the NetBSD
+;        Foundation, Inc. and its contributors.
+; 4. Neither the name of The NetBSD Foundation nor the names of its
+;    contributors may be used to endorse or promote products derived
+;    from this software without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+; PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+; POSSIBILITY OF SUCH DAMAGE.
+;
+
+;
+;armasm.exe $(InputPath)
+;arm.obj
+;
+
+	AREA	|.text|, CODE, PIC
+
+	; FlatJump_sa1100 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack
+	;		kaddr_t jump)
+	;	bootinfo	boot information block address.
+	;	pvec		page vector of kernel.
+	;	stack		physical address of stack
+	;	jump		physical address of boot function
+	; *** MMU and pipeline behavier are SA-1100 specific. ***
+	EXPORT	|FlatJump_sa1100|
+|FlatJump_sa1100| PROC
+	; disable interrupt
+	mrs	r4, cpsr
+	orr	r4, r4, #0xc0
+	msr	cpsr, r4
+	; disable MMU, I/D-Cache, Writebuffer.
+	; interrupt vector address is 0xffff0000
+	; 32bit exception handler/address range.
+	ldr	r4, [pc, #24]
+	; Disable WB/Cache/MMU
+	mcr	p15, 0, r4, c1, c0, 0
+	; Invalidate I/D-cache.
+	mcr	p15, 0, r4, c7, c7, 0	; Fetch translated	fetch
+	; Invalidate TLB entries.
+	mcr	p15, 0, r4, c8, c7, 0	; Fetch translated	decode
+	; jump to kernel entry physical address.
+	mov	pc, r3			; Fetch translated	execute
+	; NOTREACHED
+	nop				; Fetch nontranslated	cache access
+	nop				; Fetch nontranslated	writeback
+	mov	pc, lr			; Fetch nontranslated
+	DCD	0x00002030
+	ENDP  ; |FlatJump_sa1100|
+;
+;	UART test
+;
+	; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags)
+	;
+	EXPORT	|boot_func_sa1100|
+|boot_func_sa1100| PROC
+	nop				; Cop15 hazard
+	nop				; Cop15 hazard
+	nop				; Cop15 hazard
+	mov	sp, r2			; set bootloader stack
+;	mov	r4, r0
+;	mov	r5, r1
+;	bl	colorbar
+;	mov	r0, r4
+;	mov	r1, r5
+	bl	boot_sa1100
+	nop	; NOTREACHED
+	nop
+	ENDP  ; |boot_func_sa1100|
+
+	EXPORT |colorbar|
+|colorbar| PROC
+	stmfd	sp!, {r4-r7, lr}
+	adr	r4, |$FBADDR|
+	ldr	r4, [r4]
+
+	mov	r7, #8
+	add	r0, r0, r7
+|color_loop|
+	mov	r6, r0
+	and	r6, r6, #7
+	orr	r6, r6, r6, LSL #8
+	orr	r6, r6, r6, LSL #16
+	add	r5, r4, #0x9600
+|fb_loop|
+	str	r6, [r4], #4
+	cmp	r4, r5
+	blt	|fb_loop|
+
+	subs	r7, r7, #1
+	bne	|color_loop|
+
+	ldmfd	sp!, {r4-r7, pc}
+|$FBADDR|
+	DCD	0xc0003000	; use WindowsCE default.
+	ENDP  ; |colorbar|
+
+	EXPORT	|boot_sa1100|
+|boot_sa1100| PROC
+;
+;	UART test code
+;
+;	; print boot_info address (r0) and page_vector start address (r1).
+;	mov	r4, r0
+;	mov	r5, r1
+;	mov	r0, #'I'
+;	bl	btputc
+;	mov	r0, r4
+;	bl	hexdump
+;	mov	r0, #'P'
+;	bl	btputc
+;	mov	r0, r5
+;	bl	hexdump
+;	mov	r7, r4
+;	mov	r2, r5		; start
+
+	mov	r7, r0		; if enabled above debug print, remove this.
+	mov	r2, r1		; if enabled above debug print, remove this.
+|page_loop|
+	mvn	r0, #0		; ~0
+	cmp	r2, r0
+	beq	|page_end|	; if (next == ~0) goto page_end
+
+	mov	r1, r2		; p = next
+	ldr	r2, [r1]	; next
+	ldr	r3, [r1, #4]	; src
+	ldr	r4, [r1, #8]	; dst
+	ldr	r5, [r1, #12]	; sz
+
+	cmp	r3, r0
+	add	r6, r4, r5	; end address
+	bne	|page_memcpy4|	; if (src != ~0) goto page_memcpy4
+
+	mov	r0, #0
+|page_memset|			; memset (dst, 0, sz) uncached.
+	str	r0, [r4], #4
+	cmp	r4, r6
+	blt	|page_memset|
+	b	|page_loop|
+
+|page_memcpy4|			; memcpy (dst, src, sz) uncached.
+	ldr	r0, [r3], #4
+	ldr	r5, [r3], #4
+	str	r0, [r4], #4
+	cmp	r4, r6
+	strlt	r5, [r4], #4
+	cmplt	r4, r6
+	blt	|page_memcpy4|
+
+	b	|page_loop|
+|page_end|
+	;
+	; jump to kernel
+	;
+;	mov	r0, #'E'
+;	bl	btputc
+;	ldr	r0, [r7]
+;	bl	hexdump
+;	ldr	r0, [r7]
+;	ldr	r0, [r0]
+;	bl	hexdump	
+
+	; set stack pointer
+	mov	r5, #4096
+	add	r6, r6, #8192
+	sub	r5, r5, #1
+	bic	sp, r6, r5
+
+	; set bootargs
+	ldr	r4, [r7]
+	ldr	r0, [r7, #4]
+	ldr	r1, [r7, #8]
+	ldr	r2, [r7, #12]
+	mov	pc, r4
+	; NOTREACHED
+
+|infinite_loop|
+	nop
+	nop
+	nop
+	nop
+	nop
+	b	|infinite_loop|
+	ENDP  ; |boot|
+
+|btputc| PROC
+	adr	r1, |$UARTTXBSY|
+	ldr	r1, [r1]
+|btputc_busy|
+	ldr	r2, [r1]
+	and	r2, r2, #1
+	cmp	r2, #1
+	beq	|btputc_busy|
+	adr	r1, |$UARTTXADR|
+	ldr	r1, [r1]
+	str	r0, [r1]
+	mov	pc, lr
+	ENDP	;|btputc|
+
+|hexdump| PROC
+	stmfd	sp!, {r4-r5, lr}
+	mov	r4, r0
+	mov	r0, #0x30
+	bl	btputc
+	mov	r0, #0x78
+	bl	btputc
+	mov	r0, r4
+	;	Transmit register address
+	adr	r1, |$UARTTXADR|
+	ldr	r1, [r1]
+	;	Transmit busy register address
+	adr	r2, |$UARTTXBSY|
+	ldr	r2, [r2]
+	mov	r5, #8
+|hex_loop|
+	mov	r3, r0, LSR #28
+	cmp	r3, #9
+	addgt	r3, r3, #0x41 - 10
+	addle	r3, r3, #0x30
+|hex_busyloop|
+	ldr	r4, [r2]
+	and	r4, r4, #1
+	cmp	r4, #1
+	beq	|hex_busyloop|
+	str	r3, [r1]
+	mov	r0, r0, LSL #4
+	subs	r5, r5, #1
+	bne	|hex_loop|
+	mov	r0, #0x0d
+	bl	btputc
+	mov	r0, #0x0a
+	bl	btputc
+	ldmfd	sp!, {r4-r5, pc}
+	ENDP	;|hexdump|
+
+|$UARTTXADR|
+	DCD	0x80050014
+|$UARTTXBSY|
+	DCD	0x80050020
+
+	EXPORT	|boot_func_end_sa1100| [ DATA ]
+|boot_func_end_sa1100|	DCD	0x0
+
+	END
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.config src/sys/arch/hpc/stand/hpcboot/hpcboot.config
--- src.orig/sys/arch/hpc/stand/hpcboot/hpcboot.config	2008-03-15 10:56:37.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/hpcboot.config	2008-04-18 15:49:30.000000000 +0900
@@ -42,6 +42,8 @@
 	arm\arm_boot.cpp
 	arm\arm_mmu.cpp
 	arm\arm.asm
+	arm\arm_sa1100_asm.asm
+	arm\arm_pxa2x0_asm.asm
 '
 SRCFILE_LIST_SH3='
 	sh3\sh_arch.cpp
diff --exclude=CVS --exclude='obj.*' --exclude=compile --exclude='*.user' --exclude='*.vc*' -uNr src.orig/sys/arch/hpc/stand/hpcboot/menu/menu.cpp src/sys/arch/hpc/stand/hpcboot/menu/menu.cpp
--- src.orig/sys/arch/hpc/stand/hpcboot/menu/menu.cpp	2008-04-29 11:38:34.000000000 +0900
+++ src/sys/arch/hpc/stand/hpcboot/menu/menu.cpp	2008-04-29 11:47:45.000000000 +0900
@@ -41,6 +41,11 @@
 
 #include <menu/menu.h>
 
+#define SCALEX(x) (((x) * dpix) / 96/*DPI*/)
+#define SCALEY(y) (((y) * dpiy) / 96/*DPI*/)
+#define UNSCALEX(x) (((x) * 96) / dpix)
+#define UNSCALEY(y) (((y) * 96) / dpiy)
+
 TabWindow *
 TabWindowBase::boot(int id)
 {
@@ -208,6 +213,8 @@
 	HDC hdc = GetDC(0);
 	int width = GetDeviceCaps(hdc, HORZRES);
 	int height = GetDeviceCaps(hdc, VERTRES);
+	int dpix = GetDeviceCaps(hdc, LOGPIXELSX);
+	int dpiy = GetDeviceCaps(hdc, LOGPIXELSY);
 	ReleaseDC(0, hdc);
 
 	// set origin
@@ -222,17 +229,23 @@
 
 	HWND h;
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_V);
-	SetWindowPos(h, 0, x, y, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x), SCALEY(y),
+	    SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_S);
-	SetWindowPos(h, 0, x, y + 20, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 20),
+            SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_A);
-	SetWindowPos(h, 0, x, y + 40, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 40),
+	    SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_D);
-	SetWindowPos(h, 0, x, y + 60, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 60),
+	    SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_H);
-	SetWindowPos(h, 0, x, y + 80, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x), SCALEY(y + 80),
+	    SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 	h = GetDlgItem(_window, IDC_MAIN_OPTION_H_SPEED);
-	SetWindowPos(h, 0, x + 100, y + 80, 120, 10, SWP_NOSIZE | SWP_NOZORDER);
+	SetWindowPos(h, 0, SCALEX(x + 100), SCALEY(y + 80),
+	    SCALEX(120), SCALEY(10), SWP_NOSIZE | SWP_NOZORDER);
 }
 
 void
@@ -298,13 +311,18 @@
 OptionTabWindow::init(HWND w)
 {
 	struct HpcMenuInterface::HpcMenuPreferences &pref = HPC_PREFERENCE;
+	HDC hdc = GetDC(0);
+	int dpix = GetDeviceCaps(hdc, LOGPIXELSX);
+	int dpiy = GetDeviceCaps(hdc, LOGPIXELSY);
+	ReleaseDC(0, hdc);
 
 	_window = w;
 
 	TabWindow::init(_window);
 	_spin_edit = GetDlgItem(_window, IDC_OPT_AUTO_INPUT);
 	_spin = CreateUpDownControl(WS_CHILD | WS_BORDER | WS_VISIBLE |
-	    UDS_SETBUDDYINT | UDS_ALIGNRIGHT, 80, 0, 50, 50, _window,
+	    UDS_SETBUDDYINT | UDS_ALIGNRIGHT,
+	    SCALEX(80), SCALEY(0), SCALEX(50), SCALEY(50), _window,
 	    IDC_OPT_AUTO_UPDOWN, _app._instance, _spin_edit, 60, 1, 30);
 	BOOL onoff = pref.auto_boot ? TRUE : FALSE;
 	EnableWindow(_spin_edit, onoff);
@@ -426,12 +444,18 @@
 void
 ConsoleTabWindow::init(HWND w)
 {
+	HDC hdc = GetDC(0);
+	int dpix = GetDeviceCaps(hdc, LOGPIXELSX);
+	int dpiy = GetDeviceCaps(hdc, LOGPIXELSY);
+	ReleaseDC(0, hdc);
+
 	// at this time _window is NULL.
 	// use argument of window procedure.
 	TabWindow::init(w);
 	_edit = GetDlgItem(w, IDC_CONS_EDIT);
-	MoveWindow(_edit, 5, 60, _rect.right - _rect.left - 10,
-	    _rect.bottom - _rect.top - 60, TRUE);
+	MoveWindow(_edit, SCALEX(5), SCALEY(60),
+	    SCALEX(UNSCALEX(_rect.right - _rect.left) - 10),
+	    SCALEY(UNSCALEY(_rect.bottom - _rect.top) - 60), TRUE);
 	Edit_FmtLines(_edit, TRUE);
 
 	// log file.